Sigma-delta analogue-to-digital converter with gmC-VDAC

US12176925B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12176925-B2
Application numberUS-202017755229-A
CountryUS
Kind codeB2
Filing dateOct 23, 2020
Priority dateOct 25, 2019
Publication dateDec 24, 2024
Grant dateDec 24, 2024

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

The present invention relates to a sigma-delta analogue-to-digital converter. The sigma-delta analogue-to-digital converter comprises a transconductance stage having first, second and third terminals. A capacitor is connected in parallel at the third terminal. Further, the sigma-delta analogue-to-digital converter comprises a quantiser at the third terminal of the transconductance stage with feedback by a voltage digital-to-analogue converter for feeding back a feedback signal to one of the terminals of the transconductance stage.

First claim

Opening claim text (preview).

The invention claimed is: 1. A sigma-delta analogue-to-digital converter comprising: a transconductance stage comprising a first terminal, a second terminal, a third terminal and a capacitor connected in parallel at the third terminal; and a quantiser at the third terminal of the transconductance stage with a feedback by a voltage digital-to-analogue converter for feeding back a feedback signal to one of the terminals of the transconductance stage; wherein the first terminal is configured as a non-inverting input and the second terminal is configured as an inverting input, and wherein the non-inverting input is configured to receive an analogue input voltage signal and the inverting input is connected to the digital-to-analogue converter; wherein the transconductance stage is configured as a single-ended transconductance stage with a first switching element and a second switching element; and wherein the first switching element and the second switching element are connected to a power source by a terminal via a voltage node and to the third terminal of the transconductance stage by a further terminal in each case via a summing element, and the first switching element is switched via the input voltage signal and the second switching element is switched via the feedback signal at a respective control terminal. 2. The converter according to claim 1 , wherein a maximum modulation level of the transconductance stage corresponds to a difference between the received input voltage signal and the feedback signal. 3. The converter according to claim 1 , wherein in the feedback a low-pass filter is connected between the quantiser and the digital-to-analogue converter. 4. A sigma-delta analog-to-digital converter according to claim 1 for processing audio signals in communication systems, in particular in mobile communication systems. 5. A sigma-delta analogue-to-digital converter comprising: a transconductance stage comprising a first terminal, a second terminal, a third terminal and a capacitor connected in parallel at the third terminal; and a quantiser at the third terminal of the transconductance stage with a feedback by a voltage digital-to-analogue converter for feeding back a feedback signal to one of the terminals of the transconductance stage; wherein the first terminal is configured as a non-inverting input and the second terminal is configured as an inverting input, and wherein the non-inverting input is configured to receive an analoque input voltage signal and the inverting input is connected to the digital-to-analogue converter: wherein the transconductance stage is configured as a differential transconductance stage having a first differential pair input combination comprising a first switching element and a second switching element interconnected in each case via a first terminal, and a second differential pair combination comprising a third switching element and a fourth switching element interconnected in each case via a first terminal. 6. The converter according to claim 5 , wherein the first differential pair input combination is connected via a voltage node and the second differential pair input combination is connected via a voltage node to a power source, respectively, and wherein the further terminals of the first switching element and the third switching element have a common node and further terminals of the second switching element and the fourth switching element have a common node, and wherein the common nodes are each connected to the third terminal of the transconductance stage via a summing element, and the first switching element and the fourth switching element are switched via the input voltage signal and the second switching element and the third switching element are switched via the feedback signal at a respective control terminal. 7. The converter according to claim 5 , wherein the first differential pair input combination is connected via a voltage node and the second differential pair input combination is connected via a voltage node to a fifth switching element, respectively, and wherein further terminals of the first switching element and the third switching element have a common node and further terminals of the second switching element and the fourth switching element have a common node, and wherein the common nodes are each connected to the third terminal of the transconductance stage via a summing element, and the first switching element and the fourth switching element are switched via the input voltage signal, and the second switching element and the third switching element are switched via the feedback signal at a respective control terminal. 8. The converter according to claim 7 , wherein the first differential pair input combination between the voltage node and the fifth switching element and the second differential pair input combination between the voltage node and the fifth switching element each comprise a sixth switching element. 9. The converter according to claim 8 , wherein the sixth switching element of the first and the second differential pair input combination are switched by an output signal of the fifth switching element, amplified by an amplifier. 10. The converter according to claim 9 , wherein the first switching element and the second switching element are switched via the input voltage signal and the third switching element and the fourth switching element are switched via the feedback signal. 11. A sigma-delta analog-to-digital converter according to claim 5 for processing audio signals in communication systems, in particular in mobile communication systems. 12. The converter according to claim 5 , wherein a maximum modulation level of the transconductance stage corresponds to a difference between the received input voltage signal and the feedback signal. 13. The converter according to claim 5 , wherein in the feedback a low-pass filter is connected between the quantiser and the digital-to-analogue converter.

Assignees

Inventors

Classifications

  • H03M3/494Primary

    Sampling or signal conditioning arrangements specially adapted for delta-sigma type analogue/digital conversion systems · CPC title

  • using IC blocks as the active amplifying circuit · CPC title

  • Long tailed pairs (H03F3/4521, H03F3/45237 take precedence) · CPC title

  • H03M3/358Primary

    of non-linear distortion, e.g. instability (avoiding instability by structural design H03M3/44) · CPC title

  • Two or more differential amplifiers in IC-block form are combined, e.g. measuring amplifiers · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US12176925B2 cover?
The present invention relates to a sigma-delta analogue-to-digital converter. The sigma-delta analogue-to-digital converter comprises a transconductance stage having first, second and third terminals. A capacitor is connected in parallel at the third terminal. Further, the sigma-delta analogue-to-digital converter comprises a quantiser at the third terminal of the transconductance stage with fe…
Who is the assignee on this patent?
Univ Berlin Tech
What technology area does this patent fall under?
Primary CPC classification H03M3/494. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 24 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).