Hybrid arc flash mitigation system

US12170439B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12170439-B2
Application numberUS-202318197901-A
CountryUS
Kind codeB2
Filing dateMay 16, 2023
Priority dateOct 14, 2020
Publication dateDec 17, 2024
Grant dateDec 17, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A system including an arc flash sensor that detects an arc flash event and an arc flash mitigation device in communication with the sensor. The mitigation device includes a path of least resistance having a path input and a path output. The arc flash sensor is located downstream the output. The mitigation device includes an electro-mechanical switch between the input and the output and an actuator. The mitigation device also includes a bypass power switch device that includes a solid-state circuit interrupter and that conduct current between the input and the output in response to an open-circuit condition of the switch. A system controller is provided to generate a trigger to activate the actuator to generate the open-circuit condition of the switch, which causes the power switch device to interrupt a fault current associated with a fault event in response to detection of the arc flash event.

First claim

Opening claim text (preview).

The invention claimed is: 1. A system comprising: an arc flash sensor configured to detect an arc flash event; and an arc flash mitigation device in communication with the arc flash sensor, the arc flash mitigation device comprising: a path of least resistance having a path input and a path output, the path output being configured to serve as an input to a load, wherein the arc flash sensor is located downstream of the path output; an actuator; an electro-mechanical switch between the path input and the path output; a bypass power switch device that comprises a solid-state circuit interrupter and that is configured to conduct current between the path input and the path output in response to an open-circuit condition of the electro-mechanical switch; and a system controller configured to generate a trigger signal to activate the actuator to generate the open-circuit condition of the electro-mechanical switch, which causes the bypass power switch device to interrupt a fault current associated with a fault event, in response to detection of the arc flash event by the arc flash sensor. 2. The system of claim 1 , wherein: the arc flash sensor comprises a plurality of sensors that include at least one optical sensor and at least one current sensor located downstream of the path output to detect the arc flash event; and the system further comprises a plurality of branch circuits, each branch circuit being monitored by at least one optical sensor and at least one current sensor. 3. The system of claim 2 , wherein: the arc flash mitigation device further comprises a current sensor coupled upstream the path output to detect a high-current fault event; and the system controller is also configured to generate a corresponding trigger signal to activate the actuator to generate the open-circuit condition of the electro-mechanical switch to cause the bypass power switch device to interrupt a fault current associated with the high-current fault event in response to detection of the high-current fault event by the current sensor of the arc flash mitigation device. 4. The system of claim 1 , wherein: the system controller is configured to control the bypass power switch device for a normal mode of operation, an arc flash reduction mode or both; in the normal mode of operation, the electro-mechanical switch is set in a closed-circuit condition by the system controller; and in the arc flash reduction mode of operation, the electro-mechanical switch is set to an open-circuit condition and the bypass power switch device is in an “ON” state. 5. The system of claim 1 , wherein the solid-state circuit interrupter of the bypass power switch device comprises: a first transistor comprising an emitter; a second transistor comprising an emitter connected to the emitter of the first transistor, the first transistor and the second transistor form a transistor pair; and a first voltage-dependent resistor having a first side connected to a collector of the first transistor and a second side connected to a collector of the second transistor, wherein the collector of the first transistor is connected to the path input. 6. The system of claim 5 , wherein the solid-state circuit interrupter further comprises: a third transistor comprising an emitter; a fourth transistor comprising an emitter connected to the emitter of the third transistor, the third transistor and the fourth transistor form a second transistor pair; and a second voltage-dependent resistor having a first side connected to a collector of the third transistor and a second side connected to a collector of the fourth transistor, wherein: the collector of the third transistor is connected to the collector of the second transistor, and the collector of the fourth transistor is connected to the path of least resistance between the output terminal of the switch and the path output. 7. The system of claim 1 , further comprising: a housing for housing the electro-mechanical switch, the path of least resistance, the bypass power switch device and the system controller, wherein the housing comprises a molded case circuit breaker or an air circuit breaker. 8. The system of claim 1 , wherein the arc flash mitigation device further comprises an electro-mechanical switch device that comprises the electro-mechanical switch, and wherein: the electro-mechanical switch device comprises a vacuum interrupter; and the actuator comprises a Thompson coil or piezo-electric actuator connected to the vacuum interrupter. 9. The system of claim 8 , wherein the bypass power switch device also comprises a cooling device. 10. The system of claim 1 , wherein: the system further comprises a plurality of branch circuits downstream of the arc flash mitigation device; each of the branch circuits includes an associated circuit breaker; each of the circuit breakers is configured to open upon detection of a rated fault current; each of the circuit breakers is configured to, after opening in response to detection of the rated fault current, send a reclose signal to the system controller; and the system controller is further configured to, upon receipt of a reclose signal from a circuit breaker: determine whether the arc flash event occurred downstream of the circuit breaker that sent the reclose signal; and upon confirming that the arc flash event occurred downstream of the circuit breaker that sent the reclose signal, trigger the actuator that causes the electro-mechanical switch to reclose. 11. A method comprising: protecting, by an arc flash mitigation device, at least one electrical circuit downstream or upstream the arc flash mitigation device, the arc flash mitigation device including: an actuator, an electro-mechanical switch in a path of least resistance between a path input and a path output of the arc flash mitigation device, the path output being configured to serve as an input to a load, and a bypass power switch device that includes a solid-state circuit interrupter configured to conduct current between the path input and the path output when the electro-mechanical switch is open; detecting, by an arc flash sensor located downstream of the path output, an arc flash event downstream of the path output, wherein the arc flash sensor is in communication with the arc flash mitigation device; triggering, by the arc flash mitigation device, the actuator to open the electro-mechanical switch in the path of least resistance in response to detection of the arc flash event by the arc flash sensor; and interrupting a fault current representative of the detected arc flash event by the bypass power switch device of the arc flash mitigation device. 12. The method of claim 11 , wherein: the arc flash mitigation device comprises a current sensor connected upstream of the path output; and the protecting, by the arc flash mitigation device, further comprises: detecting, by the current sensor a high-current fault event downstream of the path output, triggering, by the arc flash mitigation device, the actuator to open the electro-mechanical switch in the path of least resistance in response to detection of the high-current event by the current sensor of the arc flash mitigation device, and interrupting a fault current representative of the high-current fault event by the bypass power switch device of the arc flash mitigation device. 13. The method of claim 11 , wherein: the at least one electrical circuit is downstream and each electrical circuit includes a branch circuit with a circuit breaker; and the detecting, by the arc flash sensor, comprises detecting an occurrence of the arc flash eve

Assignees

Inventors

Classifications

  • responsive to excess current (responsive to abnormal temperature caused by excess current H02H5/04) · CPC title

  • Cooling of switch parts (cooling of contacts H01H1/62) · CPC title

  • H01H9/50Primary

    Means for detecting the presence of an arc or discharge · CPC title

  • Auxiliary contacts on to which the arc is transferred from the main contacts (using arcing-horns H01H9/46) · CPC title

  • third parallel branch comprising an energy absorber, e.g. MOV, PTC, Zener · CPC title

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What does patent US12170439B2 cover?
A system including an arc flash sensor that detects an arc flash event and an arc flash mitigation device in communication with the sensor. The mitigation device includes a path of least resistance having a path input and a path output. The arc flash sensor is located downstream the output. The mitigation device includes an electro-mechanical switch between the input and the output and an actua…
Who is the assignee on this patent?
Eaton Intelligent Power Ltd
What technology area does this patent fall under?
Primary CPC classification H01H9/50. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 17 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).