Crystal growth method and a substrate for a semiconductor device

Patent metadata

Field	Value
Publication number	US-12170200-B2
Application number	US-202117565831-A
Country	US
Kind code	B2
Filing date	Dec 30, 2021
Priority date	Jan 31, 2018
Publication date	Dec 17, 2024
Grant date	Dec 17, 2024

Abstract

A crystal growth method of the present disclosure includes: preparing a crystal growth-derived-layer forming substrate including (a) a substrate having a surface layer, (b) a mask pattern which is formed on the surface layer and which includes a plurality of strip bodies, and (c) a plurality of crystal growth-derived layers which are formed between and on the plurality of stripe bodies so as to have gaps therebetween above the plurality of strip bodies and which differ in lattice constant from the substrate having the surface layer; and growing semiconductor layers on the plurality of crystal growth-derived layers. The semiconductor layers are respectively grown on the plurality of crystal growth-derived layers formed so as to be separated from each other, and semiconductor layers on two adjacent ones of the plurality of crystal growth-derived layers are separated from each other.

First claim

What is claimed is:

1. A method for manufacturing a plurality of semiconductor devices each including a crystal growth-derived layer and a semiconductor layer, the method comprising:
preparing a crystal growth-derived-layer forming substrate including (a) a substrate having a first growth region and a second growth region defined by a non-growth region having a striped configuration, (b) a first crystal growth-derived layer located above the first growth region and the non-growth region, and (c) a second crystal growth-derived layer located above the second growth region and the non-growth region; and
growing a first semiconductor layer on the first crystal growth-derived layer and growing a second semiconductor layer on the second crystal growth-derived layer, wherein:
the first semiconductor layer and the second semiconductor layer are separated from each other and are adjacent to each other, and the first crystal growth-derived layer and the second crystal growth-derived layer are separated from each other,
each of the first crystal growth-derived layer and the second crystal growth-derived layer has a lower portion joined to the substrate,
the lower portion has a width that gradually increases with distance from the substrate,
each of the first crystal growth-derived layer and the second crystal growth-derived layer includes a nitride semiconductor, and
a longitudinal direction of the striped configuration is aligned with a direction of an m-axis of both the first crystal growth-derived layer and the second crystal growth-derived layer.

2. The method according to claim 1 , wherein:
a material of the first crystal growth-derived layer and the second crystal growth-derived layers is different from a material of the substrate.

3. The method according to claim 1 , wherein:
each of the first crystal growth-derived layer and the second crystal growth-derived layer has an upper portion located above of the lower portion; and
the upper portion has a width that gradually decreases with distance from the lower portion.

4. The method according to claim 3 , wherein:
the upper portion has an inclined surface inclining with respect to a normal line of the substrate.

5. The method according to claim 4 , wherein:
the first semiconductor layer is in contact with the inclined surface of the first crystal growth-derived layer; and
the second semiconductor layer is in contact with the inclined surface of the second crystal growth-derived layer.

6. The method according to claim 4 , wherein:
the non-growth region is a mask pattern; and
the inclined surface intersects the mask pattern.

7. The method according to claim 1 , wherein:
each of the semiconductor layer and the second semiconductor layer includes a light-emitting layer.

8. A method for manufacturing a plurality of semiconductor devices each including a crystal growth-derived layer and a semiconductor layer, the method comprising:
preparing a crystal growth-derived-layer forming substrate including (a) a substrate having a first growth region and a second growth region defined by a non-growth region having a mask pattern, (b) a first crystal growth-derived layer located above the first growth region and the non-growth region, and (c) a second crystal growth-derived layer located above the second growth region and the non-growth region; and
growing a first semiconductor layer on the first crystal growth-derived layer and growing a second semiconductor layer on the second crystal growth-derived layer, wherein:
the first semiconductor layer and the second semiconductor layer are separated from each other and are adjacent to each other, and the first crystal growth-derived layer and the second crystal growth-derived layer are separated from each other,
each of the first crystal growth-derived layer and the second crystal growth-derived layer has a lower portion joined to the substrate,
the lower portion has a width that gradually increases with distance from the substrate, and
the mask pattern is removed before the first semiconductor layer and the second semiconductor layer are formed.

9. A method for manufacturing a plurality of semiconductor devices each including a crystal growth-derived layer and a semiconductor layer, the method comprising:
preparing a crystal growth-derived-layer forming substrate including (a) a substrate having a first growth region and a second growth region defined by a non-growth region having a mask pattern, (b) a first crystal growth-derived layer located above the first growth region and the non-growth region, and (c) a second crystal growth-derived layer located above the second growth region and the non-growth region; and
growing a first semiconductor layer on the first crystal growth-derived layer and growing a second semiconductor layer on the second crystal growth-derived layer, wherein:
the first semiconductor layer and the second semiconductor layer are separated from each other and are adjacent to each other, and the first crystal growth-derived layer and the second crystal growth-derived layer are separated from each other,
each of the first crystal growth-derived layer and the second crystal growth-derived layer has a lower portion joined to the substrate,
the lower portion has a width that gradually increases with distance from the substrate, and
the substrate has a groove with which the mask pattern overlaps.

10. A method for manufacturing a plurality of semiconductor devices each including a crystal growth-derived layer and a semiconductor layer, the method comprising:
preparing a crystal growth-derived-layer forming substrate including (a) a substrate having a first growth region and a second growth region defined by a non-growth region, (b) a first crystal growth-derived layer located above the first growth region and the non-growth region, and (c) a second crystal growth-derived layer located above the second growth region and the non-growth region; and
growing a first semiconductor layer on the first crystal growth-derived layer and growing a second semiconductor layer on the second crystal growth-derived layer, wherein:
the first semiconductor layer and the second semiconductor layer are separated from each other and are adjacent to each other, and the first crystal growth-derived layer and the second crystal growth-derived layer are separated from each other,
each of the first crystal growth-derived layer and the second crystal growth-derived layer has a lower portion joined to the substrate and an upper portion located above of the lower portion,
the lower portion has a width that gradually increases with distance from the substrate,
the upper portion has a width that gradually decreases with distance from the lower portion, and
the upper portion is smaller in thickness than the lower portion.

Assignees

• Kyocera Corp

Inventors

• Nishimura Takehiro
• Doumoto Chiaki

Classifications

• H10P76/4085

  characterised by the processes involved to create the masks · CPC title

• H10P14/3416 Primary

  Nitrides · CPC title

• H10P14/3242

  Structure · CPC title

• H10P14/3216

  Nitrides · CPC title

• H10P14/2926

  Crystal orientations · CPC title