Irregular devices

US12170038B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12170038-B2
Application numberUS-202418410185-A
CountryUS
Kind codeB2
Filing dateJan 11, 2024
Priority dateMay 12, 2023
Publication dateDec 17, 2024
Grant dateDec 17, 2024

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A device includes a backplane and a plurality of elements arranged on the backplane. The plurality of elements form an irregular pattern. The backplane includes a plurality of circuits. The plurality of elements are coupled to the plurality of circuits by conductive vias that are regularly spaced.

First claim

Opening claim text (preview).

The invention claimed is: 1. A device comprising: a backplane comprising a plurality of circuits; and a plurality of elements on the backplane, wherein each of the plurality of elements comprises a metallic electrode, metallic electrodes of the plurality of elements being isolated from one another and forming an irregular pattern, wherein each of the metallic electrodes is coupled to a respective circuit of the plurality of circuits in the backplane. 2. The device of claim 1 , wherein the irregular pattern comprises a Voronoi pattern. 3. The device of claim 1 , wherein at least one metallic electrode of the metallic electrodes has an irregular polygon shape. 4. The device of claim 1 , wherein adjacent metallic electrodes of the metallic electrodes have different shapes. 5. The device of claim 1 , wherein a size distribution of the plurality of elements is around a value that is identical to a spatial frequency response of the device. 6. The device of claim 1 , wherein the device comprises: a liquid crystal layer; and a transparent conductive layer on a top side of the liquid crystal layer as a common electrode, wherein the metallic electrodes are on a bottom side of the liquid crystal layer. 7. The device of claim 6 , wherein each of the metallic electrodes is one-to-one conductively coupled to the respective circuit of the plurality of circuits in the backplane via a corresponding conductive via. 8. The device of claim 7 , wherein, for each of the metallic electrodes, the corresponding conductive via is positioned at a centroid of the metallic electrode. 9. The device of claim 7 , wherein the device comprises multiple pairs of layers of metallic electrodes and conductive vias that are sequentially stacked between the liquid crystal layer and the plurality of circuits along a first direction, wherein first conductive vias of a first pair of the multiple pairs are positioned between the plurality of circuits and first metallic electrodes of the first pair and regularly spaced along a second direction perpendicular to the first direction, wherein second conductive vias of a second pair of the multiple pairs are positioned between the first metallic electrodes of the first pair and second metallic electrodes of the second pair and regularly spaced along the second direction, and wherein adjacent first conductive via and second conductive via are offset from each other along the second direction. 10. The device of claim 9 , wherein the first metallic electrodes of the first pair form a first irregular pattern, and the second metallic electrodes of the second pair form a second irregular pattern, and wherein the irregular pattern is associated with the first irregular pattern and the second irregular pattern. 11. The device of claim 6 , further comprising: a first alignment layer on top of the liquid crystal layer; a second alignment layer underneath the liquid crystal layer; and spacers, wherein the liquid crystal layer is between the first and second alignment layers, and the first and second alignment layers are separated by the spacers to maintain a thickness of the liquid crystal layer. 12. The device of claim 6 , wherein each of the metallic electrodes is configured to reflect light through the liquid crystal layer. 13. The device of claim 1 , wherein the metallic electrodes are coupled to the plurality of circuits by conductive vias that are regularly spaced. 14. A method of fabricating an irregular device, comprising: providing a backplane comprising a plurality of circuits; and forming the irregular device by forming a plurality of elements on the backplane, wherein each of the plurality of elements comprises a metallic electrode, metallic electrodes of the plurality of elements being isolated from one another and forming an irregular pattern, wherein each of the metallic electrodes is coupled to a respective circuit of the plurality of circuits in the backplane. 15. The method of claim 14 , wherein forming the irregular device comprises: forming a plurality of conductive vias on top of the plurality of circuits, wherein each of the plurality of conductive vias is conductively coupled to a respective circuit of the plurality of circuits; forming a metallic layer on top of the plurality of conductive vias; and patterning the metallic layer according to the irregular pattern to obtain the metallic electrodes. 16. The method of claim 15 , wherein the plurality of conductive vias are regularly spaced on top of the plurality of circuits. 17. The method of claim 15 , wherein, among the plurality of conductive vias, at least two pairs of adjacent conductive vias have different spaces. 18. The method of claim 15 , wherein the metallic layer is configured to be a reflective mirror. 19. The method of claim 14 , wherein forming the irregular device comprises: forming a first alignment layer on top of the metallic electrodes; forming separate spacers on the first alignment layer; forming a liquid crystal layer on the first alignment layer; forming a second alignment layer on top of the plurality of the liquid crystal layer and the separate spacers; and forming a transparent conductive layer on top of the second alignment layer as a common electrode. 20. A system, comprising: a device comprising: a backplane comprising a plurality of circuits; and a plurality of elements arranged on the backplane, wherein each of the plurality of elements comprises a metallic electrode, metallic electrodes of the plurality of elements being isolated from one another and forming an irregular pattern, wherein each of the metallic electrodes is coupled to a respective circuit of the plurality of circuits in the backplane; and a controller coupled to the device and configured to transmit at least one control signal to at least one element of the device for modulating at least one property of the at least one element.

Assignees

Inventors

Classifications

  • Diffraction optics {, i.e. systems including a diffractive element being designed for providing a diffractive effect}(G02B27/60 takes precedence) · CPC title

  • characterised by their electrical, optical, physical properties; materials therefor; method of making · CPC title

  • using liquid crystals · CPC title

  • Details of control of colour illumination sources · CPC title

  • characterised by their geometrical arrangement · CPC title

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What does patent US12170038B2 cover?
A device includes a backplane and a plurality of elements arranged on the backplane. The plurality of elements form an irregular pattern. The backplane includes a plurality of circuits. The plurality of elements are coupled to the plurality of circuits by conductive vias that are regularly spaced.
Who is the assignee on this patent?
Pacific Light & Hologram Inc
What technology area does this patent fall under?
Primary CPC classification G09G3/003. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 17 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).