Display substrate and display device

Patent metadata

Field	Value
Publication number	US-12167642-B2
Application number	US-202117769937-A
Country	US
Kind code	B2
Filing date	May 21, 2021
Priority date	Jun 16, 2020
Publication date	Dec 10, 2024
Grant date	Dec 10, 2024

Abstract

The present disclosure provides a display substrate and a display device. The display substrate includes a pixel circuit, and the pixel circuit includes a light-emitting element, a driving circuit and a capacitor circuit. The driving circuit is configured to drive the light-emitting element to emit light; a first terminal of the capacitor circuit is electrically connected to a control terminal of the driving circuit, and a second terminal of the capacitor circuit is electrically connected to a data writing-in node; the capacitor circuit includes at least two capacitors connected in parallel with each other.

First claim

What is claimed is:

1. A display substrate, comprising a pixel circuit, wherein the pixel circuit comprises a light-emitting element, a driving circuit and a capacitor circuit,
the driving circuit is configured to drive the light-emitting element to emit light;
a first terminal of the capacitor circuit is electrically connected to a control terminal of the driving circuit, and a second terminal of the capacitor circuit is electrically connected to a data writing-in node;
the capacitor circuit includes at least two capacitors connected in parallel with each other;
wherein the pixel circuit further comprises a compensation circuit, a data writing-in circuit, a light-emitting control circuit, an initialization circuit and a testing circuit;
a first terminal of the driving circuit is connected to a power supply voltage;
the data writing-in circuit is electrically connected to a gate line and a data line arranged on a base substrate of the display substrate, and the data writing-in node, and is configured to write a data voltage on the data line into the data writing-in node under the control of a gate driving signal provided by the gate line;
the light-emitting control circuit is electrically connected to a light-emitting control line, a second terminal of the driving circuit, a first electrode of the light-emitting element, the data writing-in node and a reference voltage input terminal, is configured to connect the second terminal of the driving circuit and the first electrode of the light-emitting element under the control of a light-emitting control signal provided by the light-emitting control line, and write a reference voltage into the data writing-in node; the reference voltage input terminal is used to input the reference voltage, a second electrode of the light-emitting element is connected to a low voltage;
the initialization circuit is electrically connected to a reset terminal, the reference voltage input terminal, an initialization voltage terminal, the data writing-in node and the second terminal of the driving circuit, and is configured to write the reference voltage into the data writing-in node under the control of a reset control signal provided by the reset terminal, and write an initialization voltage provided by the initialization voltage terminal into the control terminal of the driving circuit;
the compensation circuit is electrically connected to the gate line, a control terminal of the driving circuit and the second terminal of the driving circuit, and is configured to connect the control terminal of the driving circuit and the second terminal of the driving circuit under the control of the gate driving signal;
the test circuit is electrically connected to a test control terminal, the first electrode of the light-emitting element and the second electrode of the light-emitting element, is configured to connect the first electrode of the light-emitting element and the second electrode of the light-emitting element under the control of a test control signal provided by the test control terminal.

2. The display substrate according to claim 1 , wherein the pixel circuit is arranged on a base substrate of the display substrate, and the display substrate comprises a first conductive layer, a first insulating layer, a second conductive layer, a second insulating layer and a third conductive layer sequentially arranged on the base substrate; the capacitor circuit includes a first electrode, a second electrode, a third electrode, a first insulating portion, a second insulating portion and a third insulating portion;
the first electrode includes the first conductive layer, the second electrode includes the second conductive layer, the third electrode includes the third conductive layer, and the first insulating portion includes the first insulating layer, the second insulating portion includes a first part of the second insulating layer and the third insulating portion includes a second part of the second insulating layer;
the at least two capacitors connected in parallel with each other include a first capacitor and a second capacitor, the first electrode, the first insulating portion and the second electrode constitute the first capacitor, and the second electrode, the second insulating portion and the third electrode constitute the second capacitor;
an orthographic projection of the first electrode on the base substrate, an orthographic projection of the first insulating portion on the base substrate, and an orthographic projection of the second electrode on the base substrate at least partially overlap; the orthographic projection of the second electrode on the base substrate, an orthographic projection of the second insulating portion on the base substrate, and an orthographic projection of the third electrode on the base substrate at least partially overlap;
the first electrode is electrically connected to the third electrode through a first conductive connection portion, and the first conductive connection portion is arranged in a first via hole penetrating through the first insulating layer, the second conductive layer and the second insulating layer, the third insulating portion is arranged between the first conductive connection portion and the second electrode.

3. The display substrate according to claim 2 , wherein the first conductive layer is a first gate metal layer, the second conductive layer is a second gate metal layer, the third conductive layer is a source-drain metal layer, and the first insulating layer is a second gate insulating layer, and the second insulating layer is an interlayer dielectric layer; or,
the first conductive layer is a portion of an active layer that is a conductor, the second conductive layer is a first gate metal layer, the third conductive layer is a second gate metal layer, and the first insulating layer is a first gate insulating layer, and the second insulating layer is a second gate insulating layer.

4. The display substrate according to claim 1 , wherein the pixel circuit is arranged on a base substrate of the display substrate, and the display substrate comprises a first conductive layer, a first insulating layer, a second conductive layer, a second insulating layer and a third conductive layer that are sequentially arranged on the base substrate; the capacitor circuit includes a first electrode, a second electrode, a third electrode, a first insulating portion, a second insulating portion, a third insulating portion and a fourth insulating portion;
the first electrode includes the first conductive layer, the second electrode includes the second conductive layer, the third electrode includes the third conductive layer, and the first insulating portion includes the first insulating layer, the second insulating portion includes a first part of the second insulating layer, the third insulating portion includes a second part of the second insulating layer and the fourth insulating portion includes a third part of the second insulating layer;
the at least two capacitors connected in parallel with each other include a first capacitor and a second capacitor, the first electrode, the first insulating portion and the second electrode constitute the first capacitor, and the second electrode, the second insulating portion and the third electrode constitute the second capacitor;
an orthographic projection of the first electrode on the base substrate, an orthographic projection of the first insulating portion on the base substrate, and an orthographic projection of the second electrode on the base substrate at least partially overlap; the orthographic projection of the second electrode on the base substrate, an orthographic projection of the second insulating portion on the base substrate, and an orthographic projection of the third electrode on the base substrate at least partially ove

Assignees

• Boe Technology Group Co Ltd
• Beijing Boe Technology Dev Co Ltd

Inventors

• Sun Shuang
• Zhang Fangzhen
• Niu Jing
• Niu Yanan
• Peng Jintao
• Shi Lubin

Classifications

• H10W90/00 Primary

  Package configurations · CPC title

• H10D86/481 Primary

  integrated with passive devices, e.g. auxiliary capacitors · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H10H29/142

  Two-dimensional arrangements, e.g. asymmetric LED layout · CPC title