Optical device including a substrate with a conductor-filled trench on a conductive core

Patent metadata

Field	Value
Publication number	US-12166331-B2
Application number	US-202117301261-A
Country	US
Kind code	B2
Filing date	Mar 30, 2021
Priority date	Nov 20, 2020
Publication date	Dec 10, 2024
Grant date	Dec 10, 2024

Abstract

An optical device may include a substrate including a conductive core, a first layer stack on a first surface of the conductive core, a conductor-filled trench extending through the first layer stack to the conductive core such that the conductor-filled trench is on the first surface of the conductive core, and a second layer stack on a second surface of the conductive core. The optical device may include a vertical-cavity surface-emitting laser (VCSEL) chip above the conductor-filled trench. The VCSEL chip may include an array of VCSELs. A size of the conductor-filled trench may match a size of the VCSEL chip, match a size of an emission region of the array of VCSELs, or be greater than the size of the emission region of the array of VCSELs and less than the size of the VCSEL chip.

First claim

What is claimed is:

1. An optical device, comprising:
a substrate including:
a conductive core,
a first layer stack on a first surface of the conductive core, the first layer stack comprising a first set of dielectric layers and a first set of conductive layers,
a conductor-filled trench, the conductor-filled trench extending through the first layer stack to the conductive core such that the conductor-filled trench is on the first surface of the conductive core, and
a second layer stack on a second surface of the conductive core, the second layer stack comprising a second set of dielectric layers and a second set of conductive layers; and

a vertical-cavity surface-emitting laser (VCSEL) chip above the conductor-filled trench, the VCSEL chip including an array of VCSELs,
wherein a size of the conductor-filled trench matches a size of the VCSEL chip, matches a size of an emission region of the array of VCSELs, or is greater than the size of the emission region of the array of VCSELs and is less than the size of the VCSEL chip.

2. The optical device of claim 1 , wherein the conductor-filled trench is a first conductor-filled trench and the substrate further includes:
a second conductor-filled trench extending through the second layer stack to the conductive core such that the second conductor-filled trench is on the second surface of the conductive core.

3. The optical device of claim 2 , wherein the second conductor-filled trench is opposite the first conductor-filled trench such that the VCSEL chip is above the second conductor-filled trench.

4. The optical device of claim 2 , wherein a size of the second conductor-filled trench matches or is larger than the size of the emission region of the array of VCSELs.

5. The optical device of claim 1 , wherein a portion of the conductor-filled trench is between the conductive core and a bond pad region of the VCSEL chip.

6. The optical device of claim 1 , wherein a shape of the conductor-filled trench matches a shape of the VCSEL chip.

7. The optical device of claim 1 , wherein a shape of the conductor-filled trench matches a shape of the emission region of the array of VCSELs.

8. The optical device of claim 1 , wherein the conductor-filled trench is a monolithic trench.

9. The optical device of claim 1 , wherein the conductor-filled trench does not comprise a via.

10. The optical device of claim 1 , wherein no vias are in the first layer stack in a region between the VCSEL chip and the conductive core.

11. The optical device of claim 1 , wherein no portion of the first set of dielectric layers is in a region between the conductive core and the emission region of the array of VCSELs.

12. The optical device of claim 1 , wherein a region between sidewalls of the conductor-filled trench comprises a conductive material only.

13. The optical device of claim 1 , wherein the size of the conductor-filled trench is in a range from approximately 0.5 millimeters (mm) to approximately 6.0 mm.

14. An optical device, comprising:
a substrate including:
a conductive core,
a first conductor-filled trench on a first surface of the conductive core, the first conductor-filled trench extending through a first layer stack that is on the first surface of the conductive core, and
a second conductor-filled trench on a second surface of the conductive core, the second conductor-filled trench extending through a second layer stack that is on the second surface of the conductive core; and

an emitter chip mounted on the first conductor-filled trench,
wherein a size of the first conductor-filled trench matches a size of the emitter chip, matches a size of an emission region of the emitter chip, or is greater than the size of the emission region and is less than the size of the emitter chip, and
wherein the second conductor-filled trench is opposite the first conductor-filled trench such that the emitter chip is above the second conductor-filled trench.

15. The optical device of claim 14 , wherein a shape of the first conductor-filled trench matches a shape of the emitter chip.

16. The optical device of claim 14 , wherein the first conductor-filled trench is a monolithic trench.

17. A substrate, comprising:
a conductive core,
a first layer stack on a first surface of the conductive core, the first layer stack comprising first set of dielectric layers alternating with a first set of conductive layers,
a conductor-filled trench on the first surface of the conductive core, a perimeter of the conductor-filled trench being surrounded by the first layer stack,
wherein a size of the conductor-filled trench matches a size of an optical chip to be mounted on the conductor-filled trench, matches a size of an emission region of the optical chip, or is greater than the size of the emission region and is less than the size of the optical chip; and

a second layer stack on a second surface of the conductive core, the second layer stack comprising a second set of dielectric layers alternating with a second set of conductive layers.

18. The substrate of claim 17 , wherein the conductor-filled trench is a first conductor-filled trench, and the substrate further comprises:
a second conductor-filled trench on the second surface of the conductive core, a perimeter of the second conductor-filled trench being surrounded by the second layer stack,
wherein a size of the second conductor-filled trench matches or is larger than the size of the emission region of the optical chip.

19. The substrate of claim 17 , wherein the size of the conductor-filled trench is in a range from approximately 0.5 millimeters (mm) to approximately 6.0 mm.

20. The substrate of claim 17 , wherein a portion of the conductor-filled trench is between the conductive core and a bond pad region of the optical chip.

Assignees

• Lumentum Operations Llc

Inventors

• Shi Wei
• Cheung Siu Kwan
• Zhu Lijun
• Srinivasan Raman
• Zhu Huanlin

Classifications

• H10W70/63

  Vias, e.g. via plugs · CPC title

• H10W72/075

  of bond wires · CPC title

• H10W72/073

  of die-attach connectors · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W72/5363

  the connected ends being wedge-shaped · CPC title