Display apparatus and method of driving display panel using the same

US12165599B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12165599-B2
Application numberUS-202418407362-A
CountryUS
Kind codeB2
Filing dateJan 8, 2024
Priority dateMar 24, 2020
Publication dateDec 10, 2024
Grant dateDec 10, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

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A display apparatus includes a display panel, a gate driver, a data driver, a driving controller and a power voltage generator. The display panel displays an image based on input image data. The gate driver outputs a gate signal to a gate line. The data driver outputs a data voltage to a data line. The driving controller drives display areas of the display panel in different driving frequencies. The power voltage generator outputs a data power voltage to the data driver. The driving controller outputs an output data enable signal including a writing period having an active signal and a holding period having an inactive signal for the respective display areas. The power voltage generator generates the data power voltage having a high power voltage level during the writing period and a low power voltage level in at least a portion of the holding period.

First claim

Opening claim text (preview).

What is claimed is: 1. A display apparatus comprising: a display panel comprising a gate line, a data line and a pixel, and configure to display an image based on input image data; a gate driver configured to output a gate signal to the gate line; a data driver configured to output a data voltage to the data line; a driving controller configured to drive display areas of the display panel in different driving frequencies; a power voltage generator configured to output a data power voltage to the data driver; and a gamma reference voltage generator configured to output a gamma reference voltage to the data driver, wherein the display panel includes a first display area displaying a moving image and a second display area displaying a static image, wherein the first display area includes a first pixel circuit including a plurality of transistors, wherein the second display area includes a second pixel circuit including a plurality of transistors, wherein a first driving frequency of the first display area is a frequency of at least one scan signal applied to at least one of the transistors of the first display area, wherein a second driving frequency of the second display area is a frequency of at least one scan signal applied to at least one of the transistors of the second display area, wherein, in a first frame including a first time period and a second time period, at least one of the data power voltage and the gamma reference voltage has a high voltage level in the first time period corresponding to the first display area and in the second time period corresponding to the second display area, wherein, in a second frame subsequent to the first frame and including a third time period and a fourth time period, at least one of the data power voltage and the gamma reference voltage has the high voltage level in the third time period corresponding to the first display area and a low voltage level in at least a portion of the fourth time period corresponding to the second display area, and wherein the driving frequency of the display area increases when a flicker value of the display area increases. 2. The display apparatus of claim 1 , wherein the driving controller is configured to output an output data enable signal including a writing period having an active signal and a holding period having an inactive signal for the display areas, respective, and wherein the power voltage generator is configured to generate the data power voltage having the high voltage level during the writing period and the low voltage level in at least a portion of the holding period. 3. The display apparatus of claim 2 , wherein the driving controller further comprises a static image determiner determining whether each of the display areas represents a static image or a moving image. 4. The display apparatus of claim 3 , wherein the driving controller comprises a driving frequency determiner determines driving frequencies of the display areas based on flicker values according to grayscale values of the input image data corresponding to the display areas. 5. The display apparatus of claim 4 , wherein the driving controller is configured to determine whether each of the display areas is in the writing period or the holding period in a frame based on the driving frequencies of the display areas, and wherein the driving controller is configured to generate a multi frequency signal having an active level during the writing period and an inactive level during the holding period. 6. The display apparatus of claim 5 , wherein the driving controller is configured to generate a power control signal having a first level during the writing period and a second level in the at least a portion of the holding period. 7. The display apparatus of claim 6 , wherein, when a first group of the display areas has the writing period and a second group of the display areas has the holding period in the frame, the multi frequency signal has the active level when the power control signal has the first level and the multi frequency signal has the inactive level when the power control signal has the second level. 8. The display apparatus of claim 6 , wherein, when the display area is in the holding period, a period when the power control signal has the second level is shorter than a period when the multi frequency signal has the inactive level. 9. The display apparatus of claim 8 , wherein, when the display area is in the holding period, a time point when the power control signal is changed from the first level to the second level is later than a time point when the multi frequency signal is changed from the active level to the inactive level, and wherein, when the display area is in the holding period, a time point when the power control signal is changed from the second level to the first level is same as a time point when the multi frequency signal is changed from the inactive level to the active level in the holding period. 10. The display apparatus of claim 8 , wherein, when the display area is in the holding period, a time point when the power control signal is changed from the first level to the second level is later than a time point when the multi frequency signal is changed from the active level to the inactive level in the holding period, and wherein, when the display area has the holding period, a time point when the power control signal is changed from the second level to the first level is earlier than a time point when the multi frequency signal is changed from the inactive level to the active level in the holding period. 11. The display apparatus of claim 4 , wherein the driving controller further comprises a fixed frequency determiner determining whether an input frequency of the input image data has a normal type by counting a number of pulses of a vertical synchronizing signal in one second. 12. The display apparatus of claim 4 , wherein the driving controller further comprises a compensation frame inserter inserting a compensation frame between a frame of a first frequency and a frame of a second frequency when the driving frequency of the display area is changed from the first frequency to the second frequency by the driving frequency determiner. 13. A method of driving a display panel, the method comprising: independently determining driving frequencies of display areas by a driving controller; generating a data power voltage; generating a gamma reference voltage; and outputting a data voltage to a data line of the display panel using input image data, wherein the display panel includes a first display area representing a moving image and a second display area representing a static image, wherein the first display area includes a first pixel circuit including a plurality of transistors, wherein the second display area includes a second pixel circuit including a plurality of transistors, wherein a first driving frequency of the first display area is a frequency of at least one scan signal applied to at least one of the transistors of the first display area, wherein a second driving frequency of the second display area is a frequency of at least one scan signal applied to at least one of the transistors of the second display area, wherein, in a first frame including a first time period and a second time period, at least one of the data power voltage and the gamma reference voltage has a high voltage level in the first time period corresponding to the first display area and in the second time period corresponding to the second display area, wherein, in a second frame subsequent to the first frame and including a third time period and a fourth time period, at least

Assignees

Inventors

Classifications

  • Detection of image changes, e.g. determination of an index representative of the image change · CPC title

  • Partial updating of the display screen · CPC title

  • Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes · CPC title

  • using energy recovery or conservation · CPC title

  • Generation of voltages supplied to electrode drivers in a matrix display other than LCD · CPC title

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What does patent US12165599B2 cover?
A display apparatus includes a display panel, a gate driver, a data driver, a driving controller and a power voltage generator. The display panel displays an image based on input image data. The gate driver outputs a gate signal to a gate line. The data driver outputs a data voltage to a data line. The driving controller drives display areas of the display panel in different driving frequencies…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3266. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 10 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).