Method, apparatus, and system for storing memory encryption realm key IDs

Patent metadata

Field	Value
Publication number	US-12164441-B2
Application number	US-202318456683-A
Country	US
Kind code	B2
Filing date	Aug 28, 2023
Priority date	Jan 9, 2018
Publication date	Dec 10, 2024
Grant date	Dec 10, 2024

Abstract

A method, apparatus, and system for storing memory encryption realm key IDs is disclosed. A method comprises accessing a memory ownership table with a physical address to determine a realm ID associated with the physical address, accessing a key ID association structure with the realm ID to determine a realm key IS associated with the realm ID, and initiating a memory transaction based on the realm key ID. Once retrieved, the realm key ID may be stored in a translation lookaside buffer.

First claim

What is claimed is:

1. A method comprising:
accessing a memory ownership table with a physical address to determine a realm ID associated with the physical address;
accessing a key ID association structure with the realm ID to determine a realm key ID associated with the realm ID, wherein the key ID association structure is a hash table indexed by a current hash function, and wherein accessing the key ID association structure with the realm ID comprises hashing with the current hash function based on the realm ID;
in response to detecting that a number of collisions in an entry of the key ID association structure has exceeded a threshold, establishing a scratch key ID association scratch hash table having a new hash function different from the current hash function to evaluate for collisions; and
initiating a memory transaction based on the determined realm key ID associated with the realm ID.

2. The method of claim 1 , wherein the threshold of the number of collisions is programmable.

3. The method of claim 1 , further comprising:
evaluating the scratch hash function for collisions; and
replacing the current hash function of the key ID association table with the scratch hash function if the number of collisions is below a second threshold; or
selecting a new scratch hash function different from the current hash function and repeating the evaluation if the number of collisions is not below a second threshold.

4. The method of claim 1 , further comprising caching the realm key ID in a translation lookaside buffer.

5. The method of claim 1 , further comprising caching the realm key ID in a key association cache.

6. A non-transitory computer-readable medium comprising instructions which, when executed by a processor, cause the processor to:
access a memory ownership table with a physical address to determine a realm ID associated with the physical address;
access a key ID association structure with the realm ID to determine a realm key ID associated with the realm ID, wherein the key ID association structure is a hash table indexed by a current hash function, and wherein accessing the key ID association structure with the realm ID comprises hashing with the current hash function based on the realm ID;
in response to detecting that a number of collisions in an entry of the key ID association structure has exceeded a threshold, establish a scratch key ID association scratch hash table having a new hash function different from the current hash function to evaluate for collisions; and
initiate a memory transaction based on the determined realm key ID associated with the realm ID.

7. The non-transitory computer-readable medium of claim 6 , wherein the threshold of the number of collisions is programmable.

8. The non-transitory computer-readable medium of claim 6 , further comprising instructions which, when executed by the processor, cause the processor to cache the realm key ID in a translation lookaside buffer.

9. The non-transitory computer-readable medium of claim 6 , further comprising instructions which, when executed by the processor, cause the processor to cache the realm key ID in a key association cache.

Assignees

• Qualcomm Inc

Inventors

• Lasko Darren
• Avanzi Roberto
• Speier Thomas Philip
• Abdulhamid Harb
• Sethi Vikramjit

Classifications

• H04L9/0643

  Hash functions, e.g. MD5, SHA, HMAC or f9 MAC · CPC title

• G06F21/72

  in cryptographic circuits · CPC title

• G06F2212/402

  Encrypted data · CPC title

• H04L9/14

  using a plurality of keys or algorithms · CPC title

• G06F2009/45583

  Memory management, e.g. access or allocation · CPC title