Memory system and operating method thereof

Patent metadata

Field	Value
Publication number	US-12153826-B2
Application number	US-202217882230-A
Country	US
Kind code	B2
Filing date	Aug 5, 2022
Priority date	Jan 5, 2022
Publication date	Nov 26, 2024
Grant date	Nov 26, 2024

Abstract

A memory system includes a non-volatile memory device and a controller. The non-volatile memory device includes a first memory region and a second memory region. The controller stores, into the second memory region, copied data of original data stored in the first memory region and an address of the first memory region while storing, into the first memory region, an address of the second memory region, when detecting occurrence of a critical event.

First claim

What is claimed is:

1. A memory system comprising:
a non-volatile memory device comprising a plurality of memory regions, which are non-volatile; and
a controller configured to:
in response to detecting occurrence of a predetermined event, store copied data of original data stored in a first memory region among the plurality of memory regions and an address of the first memory region into a second memory region among the plurality of memory regions, and store an address of the second memory region into the first memory region, and
in response to detecting resolution of the predetermined event, read the address of the second memory region from the first memory region and read the copied data and the address of the first memory region from the second memory region using the address of the second memory region.

2. The memory system of claim 1 , wherein the controller is further configured to generate reliability data for the copied data and store the reliability data into the second memory region.

3. The memory system of claim 1 , wherein each of the first memory region and the second memory region is a memory region of a single level cell (SLC) when the original data includes data of a highest priority.

4. The memory system of claim 1 , wherein the controller is further configured to:
read the original data as first data from the first memory region,
read the copied data as second data from the second memory region, and
compare the first data and the second data to recover the original data in response to detecting resolution of the predetermined critical event.

5. The memory system of claim 1 ,
wherein the second memory region has higher reliability than the first memory region, and
wherein the controller is further configured to keep the copied data stored in the second memory region while deleting the original data from the first memory region in response to detecting resolution of the predetermined event.

6. The memory system of claim 1 , wherein the controller is further configured to identify the first memory region storing therein the original data based on the address read from the second memory region.

7. A memory system comprising:
a non-volatile memory device comprising a plurality of memory regions, which are non-volatile; and
a controller configured to:
store copied data of original data stored in a first memory region among the plurality of memory regions and an address of the first memory region into a second memory region among the plurality of memory regions,
store an address of the second memory region into the first memory region,
read, in response to detecting resolution of a predetermined event, the address of the second memory region from the first memory region,
identify the second memory region using the address of the second memory region,
recover, when the first memory region and the second memory region have the same reliability, the original data by comparing first data that is read from the first memory region with second data that is read from the second memory region, and
keep the second data while deleting the original data when the second memory region has higher reliability than the first memory region.

8. The memory system of claim 7 , wherein the controller is further configured to generate, when storing the copied data into the second memory region, reliability data for the copied data to store the reliability data into the second memory region.

9. The memory system of claim 7 , wherein the controller is configured to store the copied data into the second memory region through a single level cell (SLC) program operation.

10. An operating method of a memory system, the operating method comprising:
performing a copy operation in response to detecting occurrence of a predetermined event, and
performing a recovery operation in response to detecting resolution of the predetermined event,
wherein the copy operation includes:
an operation of storing copy information and copied data of original data stored in a first memory region into a second memory region, the copy information including an address of the first memory region, and
an operation of storing an address of the second memory region into the first memory region, and
wherein the recovery operation includes:
an operation of reading the address of the second memory region from the first memory region, and
an operation of reading the copied data and the address of the first memory region from the second memory region using the address of the second memory region.

11. The operating method of claim 10 ,
wherein the copy operation further includes an operation of generating reliability data for the copied data, and
wherein the copy information further includes the reliability data.

12. The operating method of claim 10 , wherein each of the first memory region and the second memory region is a memory region of single level cell (SLC) when the original data includes data of a highest priority.

13. The operating method of claim 10 ,
wherein the recovery operation further includes:
an operation of reading the original data as first data from the first memory region while reading the copied data as second data from the second memory region when the first memory region and the second memory region have the same reliability, and
an operation of comparing the first data and the second data to recover the original data.

14. The operating method of claim 10 , wherein the recovery operation further includes
an operation of identifying the first memory region storing therein the original data based on the address read from the second memory region.

15. The operating method of claim 10 , wherein the recovery operation further includes an operation of keeping the copied data stored in the second memory region while deleting the original data from the first memory region when the second memory region has higher reliability than the first memory region.

Assignees

• Sk Hynix Inc

Inventors

• Jang In Jong

Classifications

• G06F3/0604 Primary

  Improving or facilitating administration, e.g. storage management · CPC title

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G06F11/2043

  where the redundant components share a common memory address space · CPC title

• G06F11/1471

  involving logging of persistent data for recovery · CPC title

• G06F11/1469

  Backup restoration techniques · CPC title