Display device including two kinds of semiconductor layers

US12148763B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12148763-B2
Application numberUS-202318136756-A
CountryUS
Kind codeB2
Filing dateApr 19, 2023
Priority dateFeb 27, 2020
Publication dateNov 19, 2024
Grant dateNov 19, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device includes a first region and a second region each including a plurality of pixels, and a plurality of wires connected to the plurality of pixels, respectively, to transmit a signal, where the number of pixels per unit area in the second region is less than the number of pixels per unit area in the first region, and the number of wires per unit area in the second region is less than the number of wires per unit area in the first region.

First claim

Opening claim text (preview).

What is claimed is: 1. A display device, comprising: a substrate; a polycrystalline semiconductor layer on the substrate, the polycrystalline semiconductor layer including a channel, a first electrode, and a second electrode of a first transistor and a channel, a first electrode, and a second electrode of a second transistor; a first gate conductor layer including a gate electrode of the first transistor overlapping the channel of the first transistor, and a gate electrode of the second transistor overlapping the channel of the second transistor; an oxide semiconductor layer on the substrate, the oxide semiconductor layer including a channel, a first electrode, and a second electrode of a third transistor; a second gate conductor layer including a lower gate electrode of the third transistor overlapping the channel of the third transistor; a third gate conductor layer including an upper gate electrode of the third transistor overlapping the channel of the third transistor; and a first data conductor layer including a first initialization voltage supply line electrically connected to the second transistor, and a first connection electrode electrically connected to the second electrode of the third transistor and the gate electrode of the first transistor, wherein the first initialization voltage supply line is disposed on the same layer as the first connection electrode. 2. The display device of claim 1 , further comprising: a second initialization voltage supply line: and a fourth transistor connected between the second initialization voltage supply line and the third transistor. 3. The display device of claim 2 , wherein the oxide semiconductor layer further includes a channel, a first electrode, and a second electrode of the fourth transistor, the second gate conductor layer further includes a lower gate electrode of the fourth transistor overlapping the channel of the fourth transistor, the third gate conductor layer further includes an upper gate electrode of the fourth transistor overlapping the channel of the fourth transistor, and wherein the second initialization voltage supply line is disposed on the same layer as the first initialization voltage supply line. 4. The display device of claim 2 , further comprising: a light emitting diode connected between a driving voltage line and a common voltage line; a fifth transistor connected between the first electrode of the first transistor and a data line, the first electrode of the first transistor being connected to the driving voltage line; and a storage capacitor connected between the driving voltage line and the gate electrode of the first transistor. 5. The display device of claim 4 , wherein the polycrystalline semiconductor layer further includes a channel, a first electrode, and a second electrode of the fifth transistor, and the first gate conductor layer further includes a gate electrode of the fifth transistor. 6. The display device of claim 5 , wherein the first electrode of the first transistor is extended to the second electrode of the fifth transistor. 7. The display device of claim 5 , wherein the second gate conductor further includes a first storage electrode of the storage capacitor, and the first storage electrode overlaps the gate electrode of the first transistor. 8. The display device of claim 4 , further comprising: a sixth transistor connected between the driving voltage line and the first electrode of the first transistor; and a seventh transistor connected between the second electrode of the first transistor and the light emitting diode. 9. The display device of claim 8 , wherein the polycrystalline semiconductor layer further includes a channel, a first electrode, and a second electrode of the sixth transistor, and the first gate conductor layer further includes a gate electrode of the sixth transistor. 10. The display device of claim 9 , wherein the first electrode of the sixth transistor is connected to the driving voltage line, and the second electrode of the sixth transistor is extended to the first electrode of the first transistor. 11. The display device of claim 9 , wherein the polycrystalline semiconductor layer further includes a channel, a first electrode, and a second electrode of the seventh transistor, and the first gate conductor layer further includes a gate electrode of the seventh transistor. 12. The display device of claim 11 , wherein the first electrode of the seventh transistor is extended to the second electrode of the first transistor, and the second electrode of the seventh transistor is connected to an anode of the light emitting diode. 13. The display device of claim 1 , further comprising: a light blocking member disposed on the substrate, wherein the light blocking member is disposed between the substrate and the gate electrode of the first transistor. 14. A display device, comprising: a substrate; a polycrystalline semiconductor layer on the substrate, the polycrystalline semiconductor layer including a channel, a first electrode, and a second electrode of a first transistor, and a channel, a first electrode, and a second electrode of a second transistor; a first gate conductor layer including a gate electrode of the first transistor overlapping the channel of the first transistor, and a gate electrode of the second transistor overlapping the channel of the second transistor; an oxide semiconductor layer on the substrate, the oxide semiconductor layer including a channel, a first electrode, and a second electrode of a third transistor, and a channel, a first electrode, and a second electrode of a fourth transistor; a second gate conductor layer including a lower gate electrode of the third transistor overlapping the channel of the third transistor, a lower gate electrode of the fourth transistor overlapping the channel of the fourth transistor, and a first initialization voltage line electrically connected to the fourth transistor; a third gate conductor layer including an upper gate electrode of the third transistor overlapping the channel of the third transistor, and an upper electrode of the fourth transistor overlapping the channel of the fourth transistor; and a first data conductor layer including a second initialization voltage supply line electrically connected to the second transistor, and a first connection electrode electrically connected to the second electrode of the third transistor and the gate electrode of the first transistor, wherein the first initialization voltage line is disposed on the same layer as the lower gate electrode of the fourth transistor, and the second initialization voltage supply line is disposed on the same layer as the first connection electrode. 15. The display device of claim 14 , further comprising: a light emitting diode connected between a driving voltage line and a common voltage line; a fifth transistor connected between the first electrode of the first transistor and a data line, the first electrode of the first transistor being connected to the driving voltage line; and a storage capacitor connected between the driving voltage line and the gate electrode of the first transistor. 16. The display device of claim 15 , wherein the polycrystalline semiconductor layer further includes a channel, a first electrode, and a second electrode of the fifth transistor, and the first gate conductor layer further includes a gate electrode of the fifth transistor. 17. The display device of claim 16 , wherein the first electrode of the first transistor is extende

Assignees

Inventors

Classifications

  • characterised by the geometrical arrangement of the RGB subpixels · CPC title

  • comprising structures specially adapted for lowering the resistance · CPC title

  • the positions of the elements being controlled by the application of an electric field · CPC title

  • being organic light emitting diodes [OLED] · CPC title

  • Resolution change, inclusive of the use of different resolutions for different screen areas · CPC title

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What does patent US12148763B2 cover?
A display device includes a first region and a second region each including a plurality of pixels, and a plurality of wires connected to the plurality of pixels, respectively, to transmit a signal, where the number of pixels per unit area in the second region is less than the number of pixels per unit area in the first region, and the number of wires per unit area in the second region is less t…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D86/60. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 19 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).