Power management integrated circuit device having multiple initialization/power up modes

US12147285B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12147285-B2
Application numberUS-202218077881-A
CountryUS
Kind codeB2
Filing dateDec 8, 2022
Priority dateDec 9, 2021
Publication dateNov 19, 2024
Grant dateNov 19, 2024

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Disclosed are techniques for a power management integrated circuit (PMIC) to support a power-up sequence from a powered-down state to a powered-up state when both a main supply voltage and a backup supply voltage are present or when only the backup supply voltage is present. The PMIC may monitor the two supply voltages to identify the supply voltages that are present. The PMIC may be configured with a power-up initialization mode of operation through an EFUSE/MTP register, including a first bit to control power up of a voltage regulator of the PMIC with the main supply voltage or the backup supply voltage. Another bit may control power up of the voltage regulator with the backup supply voltage in the dual-supply or the single-supply configuration. The PMIC may execute one of four power-up sequences based on the monitored status of the supply voltages and the configured power-up initialization mode of operation.

First claim

Opening claim text (preview).

What is claimed is: 1. A power management integrated circuit (PMIC) comprising: a monitoring circuit configured to monitor a status of a main supply voltage and a status of a backup supply voltage; and a circuit to: receive the status of the main supply voltage and the status of the backup supply voltage; receive a signal indicating a power-up initialization mode of operation; determine, based on the status of the main supply voltage and the status of the backup supply voltage, a timing indicating whether the main supply voltage is present before the backup supply voltage is present or the main supply voltage is present after the backup supply voltage is present; determine a power-up initialization sequence based on the status of the main supply voltage, the status of the backup supply voltage, the signal, and the timing indicating whether the main supply voltage is present before the backup supply voltage or the main supply voltage is present after the backup supply voltage; and perform the power-up initialization sequence to bring the PMIC from a powered-down state to a powered-up state, wherein the power-up initialization sequence includes a sequence based solely on the backup supply voltage. 2. The PMIC of claim 1 , wherein the signal indicating the power-up initialization mode of operation is based on a value stored in a programmable register. 3. The PMIC of claim 2 , wherein the programmable register is programmed by a host device that communicates with the PMIC. 4. The PMIC of claim 1 , wherein the PMIC further comprises a voltage regulator configurable to generate a regulated voltage using the main supply voltage or the backup supply voltage, and wherein the signal indicating the power-up initialization mode of operation includes: a first bit to identify one of the main supply voltage or the backup supply voltage to power up the voltage regulator; and a second bit to identify using the backup supply voltage to power up the voltage regulator when either the main supply voltage and the backup supply voltage are both present or when only the backup supply voltage is present. 5. The PMIC of claim 4 , wherein the power-up initialization sequence is to determine that the main supply voltage is present before the backup supply voltage as indicated by the status of the main supply voltage and the backup supply voltage in a dual-supply configuration; and configure the voltage regulator to power up using the main supply voltage. 6. The PMIC of claim 4 , wherein the power-up initialization sequence is to: determine using the first bit that the main supply voltage is to be used to power up the voltage regulator in a dual-supply configuration; determine that the main supply voltage is present after the backup supply voltage as indicated by the status of the main supply voltage and the backup supply voltage; and configure the voltage regulator to power up using the main supply voltage. 7. The PMIC of claim 4 , wherein the power-up initialization sequence is to: determine using the first bit that the backup supply voltage is to be used to power up the voltage regulator; determine using the second bit that the backup supply voltage is to be used to power up the voltage regulator in a single-supply configuration when only the backup supply voltage is present; determine that the backup supply voltage is present as indicated by the status of the backup supply voltage; and configure the voltage regulator to power up using the backup supply voltage. 8. The PMIC of claim 4 , wherein the power-up initialization sequence is to: determine using the first bit that the backup supply voltage is to be used to power up the voltage regulator; determine using the second bit that the backup supply voltage is to be used to power up the voltage regulator in a dual-supply configuration; determine that the main supply voltage is present after the backup supply voltage as indicated by the status of the main supply voltage and the backup supply voltage; and configure the voltage regulator to power up using the backup supply voltage. 9. The PMIC of claim 1 , wherein the monitoring circuit indicates in the status that the main supply voltage or the backup supply voltage is present corresponding to when the main supply voltage or the backup supply voltage is above a threshold voltage. 10. The PMIC of claim 1 , wherein in the powered-up state, the PMIC is ready to communicate with a host device. 11. A method for powering up a power management integrated circuit (PMIC) device, comprising: monitoring, by the PMIC device, a status of a main supply voltage and a status of a backup supply voltage; determining, by the PMIC device, a power-up initialization mode of operation; determining, based on the status of the main supply voltage and the status of the backup supply voltage, a timing indicating whether the main supply voltage is present before the backup supply voltage is present or the main supply voltage is present after the backup supply voltage is present; determining, by the PMIC device, a power-up initialization sequence based on the status of the main supply voltage, the status of the backup supply voltage, the power-up initialization mode of operation, and the timing indicating whether the main supply voltage is present before the backup supply voltage or the main supply voltage is present after the backup supply voltage; and performing, by the PMIC device, the power-up initialization sequence to bring the PMIC device from a powered-down state to a powered-up state, wherein the power-up initialization sequence includes a sequence based solely on the backup supply voltage. 12. The method of claim 11 , wherein the power-up initialization mode of operation is either preconfigured on the PMIC or is configurable by a host device that communicates with the PMIC. 13. The method of claim 11 , wherein the power-up initialization sequence comprises powering up a voltage regulator using the main supply voltage or the backup supply voltage, and wherein the power-up initialization mode of operation comprises: determining based on a first bit of the power-up initialization mode of operation to use one of the main supply voltage or the backup supply voltage to power up the voltage regulator; and determining based on a second bit of the power-up initialization mode of operation to use the backup supply voltage to power up the voltage regulator when either the main supply voltage and the backup supply voltage are both present or when only the backup supply voltage is present. 14. The method of claim 13 , wherein the power-up initialization sequence comprises: determining that the main supply voltage is present before the backup supply voltage as indicated by the status of the main supply voltage and the backup supply voltage in a dual-supply configuration; and configuring the voltage regulator to power up using the main supply voltage. 15. The method of claim 13 , wherein the power-up initialization sequence comprises: determining based on the first bit to use the main supply voltage to power up the voltage regulator in a dual-supply configuration; determining that the main supply voltage is present after the backup supply voltage as indicated by the status of the main supply voltage and the backup supply voltage; and configuring the voltage regulator to power up using the main supply voltage. 16. The method of claim 13 , wherein the power-up initialization sequence comprises: determining based on the first bit to use the backup supply voltage to power up the voltage regulator; determining ba

Assignees

Inventors

Classifications

  • G05F1/56Primary

    using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title

  • Resetting means · CPC title

  • Arrangements for using multiple switchable power supplies, e.g. battery and AC (G06F1/30 takes precedence) · CPC title

  • Supervision thereof, e.g. detecting power-supply failure by out of limits supervision · CPC title

  • G06F1/3206Primary

    Monitoring of events, devices or parameters that trigger a change in power modality · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US12147285B2 cover?
Disclosed are techniques for a power management integrated circuit (PMIC) to support a power-up sequence from a powered-down state to a powered-up state when both a main supply voltage and a backup supply voltage are present or when only the backup supply voltage is present. The PMIC may monitor the two supply voltages to identify the supply voltages that are present. The PMIC may be configured…
Who is the assignee on this patent?
Rambus Inc
What technology area does this patent fall under?
Primary CPC classification G05F1/56. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 19 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).