Driver system for reducing common mode noise due to mismatches in differential signal path

US12136918B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12136918-B2
Application numberUS-202217872841-A
CountryUS
Kind codeB2
Filing dateJul 25, 2022
Priority dateJul 25, 2022
Publication dateNov 5, 2024
Grant dateNov 5, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A driver system includes a non-inverting system input, an inverting system input, a non-inverting system output and an inverting system output. The driver system includes a line driver which includes a non-inverting driver input coupled to the non-inverting system input and includes an inverting driver input coupled to the inverting system input. The line driver includes an inverting driver output and a non-inverting driver output. The driver system includes a first termination resistor coupled between the non-inverting driver output and the non-inverting system output and includes a second termination resistor coupled between the inverting driver output and the inverting system output. The driver system includes a first amplifier stage coupled to the line driver and includes a second amplifier stage coupled to the line driver.

First claim

Opening claim text (preview).

What is claimed is: 1. A driver system comprising: a line driver comprising: a first input; a second input; a first output; and a second output; a first termination resistor having a first terminal and second terminal, the first terminal of the first termination resistor coupled to the second output of the line driver; a second termination resistor having a first terminal and second terminal, the first terminal of the second termination resistor coupled to the first output of the line driver; a first amplifier stage coupled to the line driver wherein the first amplifier applies a DC voltage across the second output of the line driver and the first output of the line driver; and a second amplifier stage AC-coupled to the second terminal of the first termination resistor and the second terminal of the second termination resistor; wherein the first amplifier stage comprises: a first input coupled to the first output of the line driver and the the second output of the line driver; and a non-inverting second input adapted to be coupled to a reference first voltage. 2. A driver system comprising: a line driver comprising: a first input; a second input; a first output; and a second output; a first termination resistor having a first terminal and second terminal, the first terminal of the first termination resistor coupled to the second output of the line driver; a second termination resistor having a first terminal and second terminal, the first terminal of the second termination resistor coupled to the first output of the line driver; a first amplifier stage coupled to the line driver wherein the first amplifier applies a DC voltage across the second output of the line driver and the first output of the line driver; and a second amplifier stage AC-coupled to the second terminal of the first termination resistor and the second terminal of the second termination resistor; wherein the first amplifier stage comprises: a first output coupled to the second output of the line driver; and a second output coupled to the first output of the line driver. 3. The driver system of claim 1 , wherein the second amplifier stage comprises: a first input coupled to a first input of the first amplifier stage; and a second input coupled to the second output of the line driver and the first output of the line driver. 4. The driver system of claim 3 , wherein the first input of the second amplifier stage is coupled to a first input of the first amplifier stage via a first capacitor, and wherein the second input of the second amplifier stage is coupled to the second terminal of the first termination resistor and the second terminal of the second termination resistor via a second capacitor. 5. The driver system of claim 1 , wherein the second amplifier stage comprises: a first output coupled to the second output of the line driver; and a second output coupled to the first output of the line driver. 6. The driver system of claim 5 , wherein the first output of the second amplifier stage is coupled to the second output of the line driver via a third capacitor, and wherein the second output of the second amplifier stage is coupled to the first output of the line driver via a fourth capacitor. 7. The driver system of claim 1 , further comprising: a first compensation capacitor coupled between the first input of the line driver and the second output of the line driver; and a second compensation capacitor coupled between the of the line driver input of the line driver and the first output of the line driver. 8. The driver system of claim 1 , further comprising: a first compensation resistor coupled between the first input of the line driver and the second output of the line driver; and a second compensation resistor coupled between the of the line driver input of the line driver and the first output of the line driver. 9. The driver system of claim 1 , wherein the first amplifier stage has a low bandwidth. 10. The driver system of claim 1 , wherein the second amplifier stage has a high bandwidth. 11. A driver system comprising: a line driver comprising: a first input; a second input; a first output; and a second output; a first termination resistor having a first terminal and second terminal, the first terminal of the first termination resistor coupled to the second output of the line driver; a second termination resistor having a first terminal and second terminal, the first terminal of the second termination resistor coupled to the first output of the line driver; a first amplifier stage coupled to the line driver wherein the first amplifier applies a DC voltage across the second output of the line driver and the first output of the line driver; and a second amplifier stage coupled to the line driver, the second amplifier stage configured to minimize a voltage difference between a first common mode voltage and a second common mode voltage, the first common mode voltage is a voltage across the second output of the line driver and the first output of the line driver and the second common mode voltage is a voltage across the second terminal of the first termination resistor and the second terminal of the second termination resistor. 12. The driver system of claim 11 , wherein the second amplifier stage comprises: a first input coupled to the second terminal of the first termination resistor and the second terminal of the second termination resistor via a first capacitor; and a second input coupled to the second output of the line driver and first output of the line driver via a second capacitor. 13. The driver system of claim 11 , wherein the second amplifier stage comprises: a first output coupled to the first output of the line driver via a third capacitor; and a second output coupled to the second output of the line driver via a fourth capacitor. 14. The driver system of claim 11 , wherein the first amplifier stage comprises: a first input coupled to a voltage source; and a second input coupled to the second output of the line driver and the first output of the line driver. 15. The driver system of claim 11 , wherein the first amplifier stage comprises: a first output coupled to the first output of the line driver; and a second output coupled to the second output of the line driver. 16. A driver system comprising: a line driver comprising: a non-inverting driver first input; a second input; a first output; and a second output; a first termination resistor having a first terminal and second terminal, the first terminal of the first termination resistor coupled to the second output of the line driver; a second termination resistor having a first terminal and second terminal, the first terminal of the second termination resistor coupled to the first output of the line driver; a first amplifier stage comprising: a first input coupled to a voltage; a second input coupled to the second output of the line driver and the first output of the line driver; a first output coupled to the first output of the line driver; and a second output coupled to the second output of the line driver; and a second amplifier stage comprising: a first input coupled to the second terminal of the first termination resistor and the second terminal of the second termination resistor via a first capacitor; a second input coupled to the second output of the line driver and the first output of the line driver via a second capacitor; a first output coupled to the first output of the line driver via a third capacitor; and an inverting a second output coup

Assignees

Inventors

Classifications

  • by using feedback means (H03F3/4578 takes precedence) · CPC title

  • characterised by the way of common mode signal rejection · CPC title

  • using IC blocks as the active amplifying circuit · CPC title

  • Modifications of input or output impedance · CPC title

  • having triangular shape · CPC title

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Frequently asked questions

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What does patent US12136918B2 cover?
A driver system includes a non-inverting system input, an inverting system input, a non-inverting system output and an inverting system output. The driver system includes a line driver which includes a non-inverting driver input coupled to the non-inverting system input and includes an inverting driver input coupled to the inverting system input. The line driver includes an inverting driver out…
Who is the assignee on this patent?
Texas Instruments Inc
What technology area does this patent fall under?
Primary CPC classification H03F3/45475. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 05 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).