Process for mounting a matrix-array electroluminescent component on a carrier

US12136685B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12136685-B2
Application numberUS-201716333923-A
CountryUS
Kind codeB2
Filing dateJul 26, 2017
Priority dateSep 15, 2016
Publication dateNov 5, 2024
Grant dateNov 5, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A process for mounting a light component on a carrier. The light component includes a generally planar substrate, on a first face of which submillimetre-sized electroluminescent semiconductor elements are epitaxied in the form of a matrix. The process is noteworthy in that it eliminates the need for a layer of filler material between the component and the carrier, while providing good thermal and electrical conductivity between the component and the carrier and high mechanical strength.

First claim

Opening claim text (preview).

The invention claimed is: 1. Process for mounting a light component on a carrier, comprising: providing a light component which comprises a generally planar substrate having a first face on which a matrix-array of submillimetre-sized electroluminescent semiconductor elements are epitaxied and spatially isolated from one another in the form of a matrix; forming at least one first electrically conductive track which comprises copper on a second face of the planar substrate of the light component which is opposite to the first face having the matrix array of submillimetre-sized electroluminescent semiconductor elements thereon; providing a carrier; forming at least one second electrically conductive track which comprises copper on a face of the carrier; forming an assembly composed of the carrier and the light component by positioning the second face of the light component on said face of the carrier such that each of the first electrically conductive tracks of the light component makes contact with a respective one of the second electrically conductive tracks of the carrier; annealing the assembly composed of the carrier and the light component at a temperature of between 200° C. and 400° C. to form a hybrid bonding connection which includes a copper-copper connection at each contact site of the first and second electrically conductive tracks, said copper-copper connection providing mechanical attachment and heat exchange between the light component and the carrier. 2. Process according to claim 1 , wherein the first electrically conductive tracks formed on the second face of the substrate of the light component are arranged so as to allow each of the electroluminescent semiconductor elements of the light component to be supplied with electric current. 3. Process according to claim 1 , wherein the substrate of the light component comprises silicon, sapphire, silicon carbide or gallium nitride. 4. Process according to claim 1 , wherein the carrier comprises silicon or glass. 5. Process according to claim 1 , wherein the formation of the first and second electrically conductive tracks on the light component and on the substrate comprises the use of a photolithographic process to produce voids in the substrate and in the carrier. 6. Process according to claim 5 , wherein copper is deposited in each of the voids. 7. Process according to claim 1 , wherein the carrier and the light component comprise alignment marks that are intended to facilitate the positioning of the component on the carrier. 8. Process according to claim 2 , wherein the carrier and the light component comprise alignment marks that are intended to facilitate the positioning of the component on the carrier. 9. Process according to claim 2 , wherein the substrate of the light component comprises silicon, sapphire, silicon carbide or gallium nitride. 10. Process according to claim 2 , wherein the carrier comprises silicon or glass. 11. Process according to claim 1 , wherein: the first electrically conductive track is a first copper track, the second electrically conductive track is a second copper track, and the first copper track directly contacts the second copper track such that the hybrid bonding connection comprises a copper-to-copper connection between the light component and the carrier. 12. Process according to claim 1 , wherein the light component is a monolithic light component. 13. Process according to claim 1 , wherein the forming an assembly comprises positioning the light component on said face of the carrier without providing an adhesive or filler material between the light component and the face of the carrier. 14. Process according to claim 1 , wherein the hybrid bonding connection is formed without providing pressure to connect the light component and the carrier.

Assignees

Inventors

Classifications

  • Package configurations · CPC title

  • relative to the surface, e.g. recessed, protruding · CPC title

  • comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title

  • Subject matter not provided for in other groups of this subclass · CPC title

  • batch processes · CPC title

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What does patent US12136685B2 cover?
A process for mounting a light component on a carrier. The light component includes a generally planar substrate, on a first face of which submillimetre-sized electroluminescent semiconductor elements are epitaxied in the form of a matrix. The process is noteworthy in that it eliminates the need for a layer of filler material between the component and the carrier, while providing good thermal a…
Who is the assignee on this patent?
Valeo Vision
What technology area does this patent fall under?
Primary CPC classification H10H20/018. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 05 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).