Frame insertion and frame rate sequencing for panel glitch prevention

Patent metadata

Field	Value
Publication number	US-12136387-B2
Application number	US-202318355342-A
Country	US
Kind code	B2
Filing date	Jul 19, 2023
Priority date	Jul 29, 2022
Publication date	Nov 5, 2024
Grant date	Nov 5, 2024

Abstract

An electronic device may include processing circuitry configured to generate a first frame of image content and a second frame of image content. The second frame of image content is different from the first frame of image content. The electronic device may also include a display configured to display the first frame of image content at a first refresh rate. In response to receiving the second frame of image content, the electronic device may initially increase the refresh rate before tapering back to the first refresh rate while displaying the second frame of image content.

First claim

What is claimed is:

1. An electronic device comprising:
processing circuitry configured to generate a first frame of image content and a second frame of image content, wherein the second frame of image content is different from the first frame of image content; and
a display configured to display the first frame of image content at a first refresh rate and, in response to receiving the second frame of image content, initially increase the first refresh rate to a second refresh rate before tapering back to the first refresh rate while displaying the second frame of image content.

2. The electronic device of claim 1 , wherein the display is configured to temporarily increase the first refresh rate to the second refresh rate by inserting multiple frames of image content similar to the second frame of image content.

3. The electronic device of claim 2 , wherein the display is configured to insert the multiple frames of image content with a coarse frame insertion.

4. The electronic device of claim 2 , wherein the display is configured to insert the multiple frames of image content with a fine frame insertion.

5. The electronic device of claim 2 , wherein a luminance of the first frame is different from a luminance of the second frame, and wherein each of the luminance of the multiple inserted frames matches the luminance of the second frame.

6. The electronic device of claim 1 , wherein the first refresh rate is 1 Hz and the second refresh rate is greater than 1 Hz.

7. The electronic device of claim 1 , wherein a luminance of the display is configured to stabilize during a walkdown to a static luminance.

8. The electronic device of claim 1 , comprising a third frame of image content different from the second frame of image content, wherein the display is configured to operate at the second refresh rate and taper down to the first refresh rate.

9. The electronic device of claim 8 , comprising a fourth frame of image content similar to the third frame of image content, wherein the display is configured to operate at the first refresh rate due to the similar image content of the third frame and the fourth frame.

10. The electronic device of claim 1 , wherein the display is configured to transition from the first frame of image content to the second frame of image content based on a clock emission signal.

11. An electronic display comprising:
a display panel comprising a display pixel configured to display a first frame of image content and a second frame of image content; and
display driver circuitry configured to:
drive the display pixel to display the first frame of image content at a first refresh rate;
when the second frame of image content is different from the first frame of image content:
for a period of time, drive the display pixel to display the second frame of image content at a second refresh rate; and
after the period of time, drive the display pixel to display the second frame of image content at the first refresh rate.

12. The electronic display of claim 11 , wherein the display driver circuitry is configured to sequence down the refresh rate from the second refresh rate to the first refresh rate during the period of time.

13. The electronic display of claim 11 , wherein the display pixel comprises a native hysteresis, and after the period of time, hysteresis effects of the display pixel level out.

14. The electronic display of claim 13 , wherein increased sampling of the native hysteresis eliminates the hysteresis effects of the display pixel, and wherein the second refresh rate eliminates the hysteresis effects of the display pixel.

15. A method for operating an electronic display in a low refresh rate mode, the method comprising:
displaying, via display driver circuitry, a first frame of image content at a first refresh rate by driving a display pixel of the electronic display;
determining, via the display driver circuitry, a second frame of image content for display on the electronic display is different from the first frame of image content;
driving, via the display driver circuitry, the display pixel to display the second frame of image content by increasing a refresh rate for a period of time; and
after the period of time, driving, via the display driver circuitry, the display pixel to display the second frame of image content at the first refresh rate.

16. The method of claim 15 , wherein increasing the refresh rate comprises driving the display pixel to generate a plurality of image frames equivalent to the second frame of image content.

17. The method of claim 16 , comprising sequencing the increased refresh rate back down to the first refresh rate by changing a timing of each of the plurality of image frames, wherein the first refresh rate is a low refresh rate.

18. The method of claim 15 , comprising:
programming, via the display driver circuitry, image data onto the display pixel, wherein the image data comprises a clock emission signal configured to control a timing of the increased refresh rate and the first refresh rate; and
driving, via the display driver circuitry, the display pixel to generate the second frame of image content based on the image data and the clock emission signal.

19. The method of claim 18 , wherein the display pixel is configured to generate a plurality of image frames based on the image data and the clock emission signal, wherein the clock emission signal tapers the increased refresh rate to the first refresh rate.

20. The method of claim 15 , comprising:
determining, via the display driver circuitry, the second frame of image content is the same as the first frame of image content; and
driving, via the display driver circuitry, the electronic display to display the second frame of image content at the first refresh rate.

Assignees

• Apple Inc

Inventors

• Ryu Jie Won
• Wang Ing-Jye
• Pai Alex H
• Gauthier Alexandre V
• Singh Ardra
• Spence Arthur L
• Choo Gihoon
• Kim Hyunsoo
• Nho Hyunwoo
• Hu Jenny
• Williams Graeme M
• Lim Jongyup
• Brahma Kingsuk
• Devincentis Marc J
• Holland Peter F
• Hurley Shawn P

Classifications

• G09G2320/0266

  Reduction of sub-frame artefacts · CPC title

• G09G2320/0626

  for control of overall brightness · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G2340/0435

  Change or adaptation of the frame rate of the video stream · CPC title

• G09G2320/0233

  Improving the luminance or brightness uniformity across the screen · CPC title