Pixel circuit, driving method, display substrate and display device

US12125438B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12125438-B2
Application numberUS-202117905251-A
CountryUS
Kind codeB2
Filing dateAug 30, 2021
Priority dateAug 30, 2021
Publication dateOct 22, 2024
Grant dateOct 22, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A pixel circuit includes a light-emitting element, a driving circuit, a compensation control circuit, a data writing-in circuit, a first reset circuit, a light-emitting control circuit and an energy storage circuit; the compensation control circuit controls to connect the control end and the first end of the driving circuit; the data writing-in circuit writes a data voltage into the second end of the driving circuit; the first reset circuit writes a reference voltage into the control end of the driving circuit under the control of a reset control signal; the energy storage circuit is electrically connected to the control end of the driving circuit and the first electrode of the light-emitting element, and is configured to store electrical energy; the driving circuit controls to connect the first end and the second end of the driving circuit under the control of the control end thereof.

First claim

Opening claim text (preview).

The invention claimed is: 1. A pixel circuit, comprising a light-emitting element, a driving circuit, a compensation control circuit, a data writing-in circuit, a first reset circuit, a light-emitting control circuit and an energy storage circuit; wherein the compensation control circuit is electrically connected to a scan line, a control end of the driving circuit and a first end of the driving circuit respectively, and is configured to control to connect the control end of the driving circuit and the first end of the driving circuit under the control of a scan signal provided by the scan line; the data writing-in circuit is electrically connected to the scan line, a data line and a second end of the driving circuit respectively, and is configured to write a data voltage on the data line into the second end of the driving circuit under the control of the scan signal; the first reset circuit is electrically connected to a reset control line, a reference voltage line and the control end of the driving circuit, respectively, is configured to write a reference voltage provided by the reference voltage line into the control end of the driving circuit under the control of a reset control signal provided by the reset control line; the light-emitting control circuit is respectively electrically connected to a light-emitting control line, the second end of the driving circuit and a first electrode of the light-emitting element, and is configured to control to connect the second end of the driving circuit and the first electrode of the light-emitting element under the control of a light-emitting control signal provided by the light-emitting control line; the energy storage circuit is respectively electrically connected to the control end of the driving circuit and the first electrode of the light-emitting element, and is configured to store electrical energy; the driving circuit is configured to control to connect the first end of the driving circuit and the second end of the driving circuit under the control of the control end of the driving circuit. 2. The pixel circuit according to claim 1 , wherein the compensation control circuit comprises a first transistor; a gate electrode of the first transistor is electrically connected to the scan line, a first electrode of the first transistor is electrically connected to the control end of the driving circuit, and a second electrode of the first transistor is electrically connected to the first end of the driving circuit; the first reset circuit includes a second transistor; a gate electrode of the second transistor is electrically connected to the reset control line, a first electrode of the second transistor is electrically connected to the reference voltage line, and a second electrode of the second transistor is electrically connected to the control end of the driving circuit; the data writing-in circuit includes a third transistor; a gate electrode of the third transistor is electrically connected to the scan line, a first electrode of the third transistor is electrically connected to the data line, and a second electrode of the third transistor is electrically connected to the second end of the driving circuit. 3. The pixel circuit according to claim 2 , wherein the first transistor and/or the second transistor are metal oxide thin film transistors; and/or the third transistor is a metal oxide thin film transistor. 4. The pixel circuit according to claim 1 , wherein the energy storage circuit comprises a storage capacitor; a first electrode plate of the storage capacitor is electrically connected to the control end of the driving circuit, and a second electrode plate of the storage capacitor is electrically connected to the first electrode of the light-emitting element. 5. The pixel circuit according to claim 1 , further comprising a second reset circuit; wherein the second reset circuit is respectively electrically connected to the reset control line, an initial voltage line and the first electrode of the light-emitting element, and is configured to write an initial voltage provided by the initial voltage line into the first electrode of the light-emitting element under the control of the reset control signal wherein the second reset circuit comprises a fourth transistor; a gate electrode of the fourth transistor is electrically connected to the reset control line, a first electrode of the fourth transistor is electrically connected to the initial voltage line, and a second electrode of the fourth transistor is electrically connected to the first electrode of the light-emitting element. 6. The pixel circuit according to claim 1 , wherein the light-emitting control circuit is also electrically connected to a first voltage line and the first end of the driving circuit, is configured to control to connect the first voltage line and the first end of the driving circuit under the control of the light-emitting control signal, wherein the light-emitting control circuit comprises a fifth transistor and a sixth transistor; a gate electrode of the fifth transistor is electrically connected to the light-emitting control line, a first electrode of the fifth transistor is electrically connected to the first voltage line, and a second electrode of the fifth transistor is electrically connected to the first end of the driving circuit; a gate electrode of the sixth transistor is electrically connected to the light-emitting control line, a first electrode of the sixth transistor is electrically connected to the second end of the driving circuit, and a second electrode of the sixth transistor is electrically connected to the first electrode of the light-emitting element; a second electrode of the light-emitting element is electrically connected to a second voltage lin. 7. The pixel circuit according to claim 1 , wherein the driving circuit comprises a driving transistor; a gate electrode of the driving transistor is electrically connected to the control end of the driving circuit, a first electrode of the driving transistor is electrically connected to the first end of the driving circuit, and a second electrode of the driving transistor is electrically connected to the second end of the driving circuit. 8. A display substrate comprising a base substrate and a plurality of sub-pixels arranged on the base substrate, wherein the sub-pixel comprises the pixel circuit according to claim 1 . 9. The display substrate according to claim 8 , wherein the compensation control circuit includes a first transistor, the first reset circuit includes a second transistor, and the data writing-in circuit includes a third transistor; the first transistor includes a first active pattern, and the second transistor includes a second active pattern, the third transistor includes a third active pattern; the first active pattern, the second active pattern and the third active pattern are formed by a same semiconductor layer; the semiconductor layer is made of a metal oxide material. 10. The display substrate according to claim 9 , wherein the semiconductor layer is a first semiconductor layer; the pixel circuit further includes a second reset circuit; the second reset circuit includes a fourth transistor; the light-emitting control circuit includes a fifth transistor and a sixth transistor; the driving circuit includes a driving transistor; the fourth transistor includes a fourth active pattern, and the fifth transistor includes a fifth active pattern, the sixth transistor includes a sixth active pattern, and the driving transistor includes a driving active pattern; the fourth active pattern, the fifth active pattern, the sixth active pattern and the driving active pattern are formed of a second semic

Assignees

Inventors

Classifications

  • Improving the luminance or brightness uniformity across the screen · CPC title

  • Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes · CPC title

  • Details of timing specific for flat panels, other than clock recovery · CPC title

  • with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

  • forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

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What does patent US12125438B2 cover?
A pixel circuit includes a light-emitting element, a driving circuit, a compensation control circuit, a data writing-in circuit, a first reset circuit, a light-emitting control circuit and an energy storage circuit; the compensation control circuit controls to connect the control end and the first end of the driving circuit; the data writing-in circuit writes a data voltage into the second end …
Who is the assignee on this patent?
Chengdu Boe Optoelect Tech Co, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3233. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 22 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).