Display having staggered display element arrangement
US-9196199-B2 · Nov 24, 2015 · US
Electrical inspection method
US12123799B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12123799-B2 |
| Application number | US-201816765564-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 9, 2018 |
| Priority date | Nov 24, 2017 |
| Publication date | Oct 22, 2024 |
| Grant date | Oct 22, 2024 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
An electrical inspection method includes: a step of preparing a wafer in which a plurality of Fabry-Perot interference filter portions is formed, each of the plurality of Fabry-Perot interference filter portions in which a distance between a first mirror portion and a second mirror portion facing each other varies by an electrostatic force; and a step of inspecting electrical characteristics of each of the plurality of Fabry-Perot interference filter portions.
First claim
Opening claim text (preview).
The invention claimed is: 1. An electrical inspection method comprising: a step of preparing a wafer including a substrate layer and a plurality of pairs two-dimensionally arranged on the substrate layer, each of the plurality of pairs having a first mirror portion and a second mirror portion, a plurality of Fabry-Perot interference filter portions being formed in the wafer, each of the plurality of Fabry-Perot interference filter portions in which a gap is formed between the first mirror portion and the second mirror portion facing each other and a distance between the first mirror portion and the second mirror portion facing each other varies by an electrostatic force; and a step of inspecting electrical characteristics of each of the plurality of Fabry-Perot interference filter portions before the wafer is cut, wherein each of the plurality of Fabry-Perot interference filter portions is configured to be a respective Fabry-Perot interference filter after the wafer is cut, each of the plurality of Fabry-Perot interference filter portions includes a pair of electrodes to generate the electrostatic force, a pair of terminals, and a plurality of wirings, each of the terminals is electrically connected to each of the electrodes through respective wirings, and each of the plurality of Fabry-Perot interference filter portions is surrounded by a region in which no wiring is formed. 2. The electrical inspection method according to claim 1 , wherein in the step of inspecting the electrical characteristics, capacitance is measured between a pair of terminals provided in each of the plurality of Fabry-Perot interference filter portions to generate an electrostatic force. 3. The electrical inspection method according to claim 1 , wherein in the step of inspecting the electrical characteristics, leakage current is measured by applying voltage between a pair of terminals provided in each of the plurality of Fabry-Perot interference filter portions to generate an electrostatic force. 4. The electrical inspection method according to claim 1 , further comprising a step of imaging the wafer.
Assignees
Inventors
Classifications
- G02B26/001Primary
based on interference in an adjustable optical cavity (interference filters G02B5/28; devices or arrangements using multiple reflections in spectrometry or monochromators G01J3/26) · CPC title
Interference filters · CPC title
Measuring capacitance (capacitive sensors G01D5/24) · CPC title
Needle-like · CPC title
- G01J3/26Primary
using multiple reflection, e.g. Fabry-Perot interferometer, variable interference filters · CPC title
Patent family
Related publications grouped by family.
External sources
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US12123799B2 cover?
- An electrical inspection method includes: a step of preparing a wafer in which a plurality of Fabry-Perot interference filter portions is formed, each of the plurality of Fabry-Perot interference filter portions in which a distance between a first mirror portion and a second mirror portion facing each other varies by an electrostatic force; and a step of inspecting electrical characteristics of…
- Who is the assignee on this patent?
- Hamamatsu Photonics Kk
- What technology area does this patent fall under?
- Primary CPC classification G02B26/001. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Oct 22 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).