Display substrate and display apparatus

Patent metadata

Field	Value
Publication number	US-12114545-B2
Application number	US-202017419763-A
Country	US
Kind code	B2
Filing date	Sep 11, 2020
Priority date	Jun 5, 2020
Publication date	Oct 8, 2024
Grant date	Oct 8, 2024

Abstract

A display substrate and a display apparatus. In the display substrate, the first signal line sequentially passes through the first display region, the opening peripheral region and the second display region along a first direction, and includes a first lead portion and a first winding portion that are in the opening peripheral region and connected to each other; the first winding portion partially surrounds the opening; the second signal line provides a second display signal to the pixel array, passes through the peripheral region of the opening along a second direction intersecting with the first direction, includes a second winding portion in the peripheral region of the opening and partially surrounds the opening. The first lead portion and the second signal line have a first overlapping region, and the first winding portion and the second winding portion have a second overlapping region.

First claim

What is claimed is:

1. A display substrate, comprising:
a base substrate, comprising:
a first opening region comprising a first opening and a first opening peripheral region surrounding the first opening;
a display region which at least partially surrounds the first opening region and comprises:
a first display region on a first side of the first opening region; and
a second display region on a second side of the first opening region, wherein the first side and the second side are opposite to each other in a first direction, and a whole of the first display region and the second display region comprises a first pixel array;
a first signal line which is configured to provide a first display signal to the first pixel array, sequentially passes through the first display region, the first opening peripheral region, and the second display region along the first direction, and comprises a first lead line portion and a first winding line portion that are in the first opening peripheral region, wherein the first winding line portion partially surrounds the first opening, and the first lead line portion is connected to the first winding line portion; and
a second signal line which is configured to provide a second display signal to the first pixel array, passes through the first opening peripheral region in a second direction intersecting the first direction, and comprises a second winding line portion in the first opening peripheral region, wherein the second winding line portion partially surrounds the first opening, wherein
an orthographic projection of the first lead line portion on the base substrate and an orthographic projection of the second signal line on the base substrate have a first overlapping region, an orthographic projection of the first winding line portion on the base substrate and an orthographic projection of the second winding line portion on the base substrate have a second overlapping region, and an area of the first overlapping region is smaller than an area of the second overlapping region.

2. The display substrate according to claim 1 , wherein the first winding line portion extends around the first opening from the first side of the first opening to the second side of the first opening, and the first side of the first opening and the second side of the first opening are opposite to each other in the first direction; and
the second winding line portion extends around the first opening from a third side of the first opening to a fourth side of the first opening, and the third side and the fourth side are opposite to each other in the second direction.

3. The display substrate according to claim 1 , wherein the first pixel array comprises a first pixel row and a second pixel row that respectively extend along the first direction, and the first pixel row and the second pixel row are both disconnected by the first opening region;
the display substrate comprises a plurality of the first signal lines, and the plurality of the first signal lines comprise:
the first signal line configured to provide the first display signal to the first pixel row, wherein the first winding line portion of the first signal line providing the first display signal to the first pixel row partially surrounds the first opening on a third side of the first opening; and
the first signal line configured to provide the first display signal to the second pixel row, wherein the first winding line portion of the first signal line providing the first display signal to the second pixel row partially surrounds the first opening on a fourth side of the first opening.

4. The display substrate according to claim 3 , wherein the first pixel array comprises a first pixel column and a second pixel column that respectively extend along the second direction;
the display substrate comprises a plurality of the second signal lines, and the plurality of the second signal lines comprise:
the second signal line configured to provide the second display signal to the first pixel column, wherein the second winding line portion of the second signal line providing the second display signal to the first pixel column protrudes toward the first side of the first opening and partially surrounds the first opening on the first side of the first opening; and
the second signal line configured to provide the second display signal to the second pixel column, wherein the second winding line portion of the second signal line providing the second display signal to the second pixel column protrudes toward the second side of the first opening and partially surrounds the first opening on the second side of the first opening.

5. The display substrate according to claim 4 , wherein the first winding line portion of the first signal line providing the first display signal to the first pixel row, and the first winding line portion of the first signal line providing the first display signal to the second pixel row are substantially symmetrical with respect to a symmetry axis along the first direction; and
the second winding line portion of the second signal line providing the second display signal to the first pixel column, and the second winding line portion of the second signal line providing the second display signal to the second pixel column are substantially symmetrical with respect to a symmetry axis along the second direction.

6. The display substrate according to claim 1 , wherein a planar shape of the first winding line portion and a planar shape of the second winding line portion respectively constitute a part of a concentric ring of a planar shape of the first opening.

7. The display substrate according to claim 1 , wherein a planar shape of the first winding line portion and a planar shape of the second winding line portion respectively comprise an arc shape, or respectively comprise an arc shape and a straight line segment.

8. The display substrate according to claim 1 , wherein the first signal line is a gate scanning signal line, and the first display signal is a gate scanning signal.

9. The display substrate according to claim 1 , wherein the display region comprises a plurality of pixels, each of the pixels comprises a plurality of sub-pixels, each of the sub-pixels comprises a pixel circuit, and the pixel circuit comprises:
a transistor comprising an active layer, a gate electrode, a source electrode and a drain electrode;
a light-emitting element connected to one of the source electrode and the drain electrode of the transistor; and
a storage capacitor comprising a first electrode plate and a second electrode plate, wherein the gate electrode, the first signal line and the first electrode plate of the storage capacitor are in a same layer.

10. The display substrate according to claim 9 , further comprising:
a third display region, wherein the third display region is on at least one side of both the first display region and the second display region in the second direction, the third display region is connected to both the first display region and the second display region, the third display region comprises a second pixel array, and the second pixel array comprises a plurality of rows of pixels and a plurality of columns of pixels; and
a plurality of third signal lines which are configured to respectively provide a third display signal to the plurality of rows of pixels comprised in the second pixel array and extend along the first direction, wherein the second signal line is further configured to provide the second display signal to the plurality of columns of pixels of the second pixel array.

11. The display substrate according to claim 10 , wherein
a total number of pixels comprised in each row of pixels of the second

Assignees

• Chengdu Boe Optoelect Tech Co
• Boe Technology Group Co Ltd

Inventors

• Yang Huijuan
• Zhou Yang
• Jiang Xiaofeng
• Shang Tinghua
• Li Gen

Classifications

• H10K59/65

  OLEDs integrated with inorganic image sensors · CPC title

• H10K59/1216

  the pixel elements being capacitors · CPC title

• H10K59/1213

  the pixel elements being TFTs · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title