Sleep signaling handshake for ethernet
US-11811551-B2 · Nov 7, 2023 · US
US12113643B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12113643-B2 |
| Application number | US-202318502963-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 6, 2023 |
| Priority date | Sep 30, 2020 |
| Publication date | Oct 8, 2024 |
| Grant date | Oct 8, 2024 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A first communication device performs a handshaking procedure with a second communication device, the handshaking procedure associated with transitioning from an active mode to a low power mode. The first communication device transmits data and/or idle symbols to the second communication device i) after completion of the handshake procedure, and ii) at least until the earlier of a) a time period expiring, and b) determining that the second communication device quieted a transmitter of the second communication device. The first communication device transitions to the low power mode in connection with the handshaking procedure.
Opening claim text (preview).
What is claimed is: 1. A first communication device, comprising: a physical layer (PHY) processor comprising a transceiver, the PHY processor being configured to perform PHY functions associated with a communication link including transmitting information to a second communication device via a communication medium corresponding to the communication link and receiving information from the second communication device via the communication medium, wherein the PHY processor is configured to transition between an active mode and a low power mode; and a controller having a timer, the controller being configured to: in response to determining that the PHY processor is to transition to the low power mode, enter a first logic state in which the controller i) controls the PHY processor to transmit a first sleep request to the second communication device via the communication medium, ii) starts the timer, and iii) controls the PHY processor to continue to transmit data and/or idle symbols to the second communication device while in the first logic state, in response to i) determining that the second communication device transmitted a second sleep request corresponding to the first sleep request, and ii) the earlier of a) the timer expiring, and b) determining that the second communication device quieted a transmitter of the second communication device after transmitting the second sleep request, transition from the first logic state to a second logic state in which the controller controls the PHY processor to quiet a transmitter of the first communication device as part of transitioning the PHY processor to the low power mode, and control the PHY processor to transition to the low power mode after transitioning to the second logic state. 2. The first communication device of claim 1 , wherein the controller is configured to transition from the first logic state to the second logic state in response to: determining that i) the timer expired and ii) the first communication device has received the second sleep request from the second communication device; and determining that the second communication device quieted the transmitter of the second communication device after the first communication device received the second sleep request from the second communication device. 3. The first communication device of claim 1 , wherein: the timer is configured to measure a time period during which the second communication is expected to recognize the first sleep request; and the controller is configured to control the PHY processor to quiet the transmitter of the first communication device while in the second logic state after the timer expires to prevent the quieting of the transmitter of the first communication device prior to the second communication device recognizing the first sleep request. 4. The first communication device of claim 1 , wherein the controller is configured to start the timer in connection with transmitting the first sleep request. 5. The first communication device of claim 1 , wherein the controller is configured to control the PHY processor to transmit the first sleep request in response to the first communication device receiving the second sleep request. 6. The first communication device of claim 1 , wherein: the timer is configured to measure approximately 94.5 microseconds. 7. The first communication device of claim 6 , wherein: the timer is configured to measure 94.504 microseconds, +0.936 microseconds. 8. The first communication device of claim 1 , wherein: the timer is a first timer; the time period is a first time period; the controller further comprises a second timer that is configured to measure a second time period during which the first communication device is expected to receive the second sleep request from the second communication device as part of the handshaking procedure; and the controller is further configured to: start the second timer while in the first logic state, and in response to determining that the second timer expired prior to receiving the second sleep request from the second communication device as part of the handshaking procedure, transition from the first logic state to a third logic state that corresponds to failure of the handshaking procedure. 9. The first communication device of claim 1 , wherein the controller is configured to: determine that the PHY processor is to transition to the low power mode in response to receiving the second sleep request from the second communication device. 10. The first communication device of claim 1 , wherein the controller is a component of the PHY processor. 11. The first communication device of claim 1 , wherein the controller further comprises: a processor; and a memory coupled to the processor, the memory storing instructions that, when executed by the processor, cause the processor to: enter the first logic state, and transition from the first logic state to the second logic state. 12. The first communication device of claim 1 , wherein the controller further comprises a hardware state machine configured to transition between a plurality of states, the plurality of states including the first state and the second state. 13. A method for transitioning a first communication device between an active mode and a low power mode, the method comprising: in response to determining that a physical layer processor of the first communication device is to transition to the low power mode, entering, by a controller of the first communication device, a first logic state in which the controller i) controls the PHY processor to transmit a first sleep request to a second communication device via a communication medium, ii) starts a timer, and iii) controls the PHY processor to continue to transmit data and/or idle symbols to the second communication device while in the first logic state; in response to i) determining that the second communication device transmitted a second sleep request corresponding to the first sleep request, and ii) the earlier of a) the timer expiring, and b) determining that the second communication device quieted a transmitter of the second communication device after transmitting the second sleep request, transitioning, by the controller, from the first logic state to a second logic state in which the controller controls the PHY processor to quiet a transmitter of the first communication device as part of transitioning the PHY processor to the low power mode; and transitioning the PHY processor to the low power mode after the controller transitions to the second logic state. 14. The method for transitioning the first communication device between the active mode and the low power mode of claim 13 , wherein transitioning from the first logic state to the second logic state is in response to at least one of: determining, by the controller, that i) the timer expired and ii) the first communication device has received the second sleep request from the second communication device; and determining, by the controller, that the second communication device quieted the transmitter of the second communication device after the first communication device received the second sleep request from the second communication device. 15. The method for transitioning the first communication device between the active mode and the low power mode of claim 13 , wherein: the timer is configured to measure a time period during which the second communication is expected to recognize the first sleep request; and controlling the PHY processor to quiet the transmitter while in the second logic state after the timer expires is to pr
the transportation system being a vehicle · CPC title
Details regarding the feeding of energy to the node from the bus · CPC title
Details regarding a bus controller · CPC title
Current supply arrangements · CPC title
in wire-line communication networks, e.g. low power modes or reduced link rate · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.