Data processing method and apparatus, and related product for increased efficiency of tensor processing

US12112166B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12112166-B2
Application numberUS-202318369819-A
CountryUS
Kind codeB2
Filing dateSep 18, 2023
Priority dateApr 4, 2019
Publication dateOct 8, 2024
Grant dateOct 8, 2024

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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The present disclosure provides a data processing method and an apparatus and a related product for increased efficiency of tensor processing. The products include a control module including an instruction caching unit, an instruction processing unit, and a storage queue unit. The instruction caching unit is configured to store computation instructions associated with an artificial neural network operation; the instruction processing unit is configured to parse the computation instructions to obtain a plurality of operation instructions; and the storage queue unit is configured to store an instruction queue, where the instruction queue includes a plurality of operation instructions or computation instructions to be executed in the sequence of the queue. By adopting the above-mentioned method, the present disclosure can improve the operation efficiency of related products when performing operations of a neural network model.

First claim

Opening claim text (preview).

What is claimed is: 1. A data processing apparatus for increased efficiency of tensor processing, comprising: a controller configured to obtain content of a descriptor from a descriptor storage space according to an identifier of the descriptor included in an operand of a first processing instruction, wherein the content of the descriptor includes a shape vector that indicates a multi-dimensional shape of tensor data on which the first processing instruction is to be executed; and a processing circuit is configured to: receive the content of the descriptor and the first processing instruction from the controller; obtain the tensor data from a data storage space based on the content of the descriptor; and execute the first processing instruction on the tensor data. 2. The data processing apparatus of claim 1 , wherein the shape vector comprises N shape parameters to indicate that the tensor data has N dimensions and each shape parameter indicates a feature of the tensor data in a corresponding dimension, where N is a positive integer. 3. The data processing apparatus of claim 2 , wherein the shape parameter includes at least one of: a size of the data storage space in at least one of the N dimensions, a size of a storage area of the tensor data in at least one of the N dimensions, an offset of the storage area in at least one of the N dimensions, or a position of at least two vertices at diagonal positions in the N dimensions relative to a datum point of the descriptor. 4. The data processing apparatus of claim 1 , wherein to obtain the tensor data from the data storage space based on the content of the descriptor, the processing circuit is further configured to: determine a data address of the tensor data in the data storage space; determine a storage size of the tensor data based on the shape vector in the content of the descriptor; and obtain the tensor data from the data storage space based on the data address and the storage size of the tensor data. 5. The data processing apparatus of claim 4 , wherein the operand further includes a data description position for the descriptor, wherein the processing circuit is configured to determine the data address of the tensor data in the data storage space according to the content of the descriptor and the data description position. 6. The data processing apparatus of claim 5 , wherein the content of the descriptor further indicates a start address of the data storage space of the tensor data, wherein the processing circuit is configured to determine the data address of the tensor data in the data storage space according to the start address of the data storage space of the tensor data and a mapping relationship between the data description position of the tensor data and the data address. 7. The data processing apparatus of claim 1 , wherein the first processing instruction includes a data access instruction, wherein the controller is configured to obtain content of a first descriptor and content of a second descriptor from the descriptor storage space respectively based on an identifier of the first descriptor and an identifier of the second descriptor included in an operand of the first processing instruction: wherein the processing circuit is configured to execute the data access instruction according to the content of the first descriptor and the content of the second descriptor received from the controller. 8. The data processing apparatus of claim 7 , to execute the data access instruction according to the content of the first descriptor and the content of the second descriptor received from the controller, the processing circuit is configured to: obtain a first data address of source data and a second data address of target data respectively according to the content of the first descriptor and the content of the second descriptor: and read the source data from the first data address and write the source data into the second data address as the target data. 9. The data processing apparatus of claim 1 , wherein the first processing instruction includes an operation instruction, wherein the processing circuit is configured to read the tensor data from the data storage space and execute an operation corresponding to the operation instruction. 10. The data processing apparatus of claim 1 , wherein the controller is further configured to: decode the first processing instruction to obtain a decoded first processing instruction, wherein the decoded first processing instruction includes an operation code and one or more operands, and the operation code is used to indicate a processing type corresponding to the first processing instruction. 11. The data processing apparatus of claim 1 , wherein the descriptor storage space is a storage space in an internal memory of the controller, and the data storage space is a storage space in an internal memory of the controller or a storage space in an external memory connected to the controller. 12. A data processing method for increased efficiency of tensor processing, comprising: obtaining, by a controller, content of a descriptor from a descriptor storage space according to an identifier of the descriptor included, in an operand of a first processing instruction, wherein the content of the descriptor includes a shape vector that indicates a multi-dimensional shape of tensor data on which the first processing instruction is to be executed; and receiving, by a processing circuit from the controller, the content of the descriptor and the first processing instruction; obtaining, by the processing circuit, the tensor data from a data storage space based on the content of the descriptor; and executing, by the processing circuit, the first processing instruction on the tensor data. 13. The data processing method of claim 12 , wherein the shape vector comprises N shape parameters to indicate that the tensor data has N dimensions and each shape parameter includes at least one of: a size of the data storage space in at least one of the N dimensions, a size of a storage area of the tensor data in at least one of the N dimensions, an offset of the storage area in at least one of the N dimensions, or a position of at least two vertices at diagonal positions in the N dimensions relative to a datum point of the descriptor, wherein N is a positive integer. 14. The data processing method of claim 12 , wherein obtaining the tensor data from the data storage space based on the content of the descriptor further comprises: determining a data address of the tensor data in the data storage space; determining a storage size of the tensor data based on the shape vector in the content of the descriptor; and obtaining the tensor data from the data storage space based on the data address and the storage size of the tensor data. 15. The data processing method of claim 14 , wherein the operand further includes a data description position for the descliptor, wherein the data address of the tensor data in the data storage space is determined according to the content of the descriptor and the data description position. 16. The data processing method of claim 15 , wherein the content of the descriptor further indicates a start address of the data storage space of the tensor data, wherein the data address of the tensor data in the data storage space is determined according to the start address of the data storage space of the tensor data, md a mapping relationship between the data description position of the tensor data and the data address. 17. The data processing method of claim 12 , wherein the fi

Assignees

Inventors

Classifications

  • according to data descriptor, e.g. dynamic data typing · CPC title

  • using electronic means · CPC title

  • PCI express · CPC title

  • on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

  • Details of memory controller · CPC title

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What does patent US12112166B2 cover?
The present disclosure provides a data processing method and an apparatus and a related product for increased efficiency of tensor processing. The products include a control module including an instruction caching unit, an instruction processing unit, and a storage queue unit. The instruction caching unit is configured to store computation instructions associated with an artificial neural netwo…
Who is the assignee on this patent?
Cambricon Tech Corp Ltd
What technology area does this patent fall under?
Primary CPC classification G06F13/4282. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 08 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).