Erasure coding write hole closure for solid-state drive (SSD) erasure coding

Patent metadata

Field	Value
Publication number	US-12112055-B2
Application number	US-202016865566-A
Country	US
Kind code	B2
Filing date	May 4, 2020
Priority date	May 4, 2020
Publication date	Oct 8, 2024
Grant date	Oct 8, 2024

Abstract

An embodiment of an electronic storage system includes one or more storage drives, at least one or more of the storage drives supporting erasure coding (EC); and a controller including logic to control local access to the one or more storage drives. The controller, in response to a write command, is to for one or more storage drives, allocate an intermediate buffer in the storage drive's non-volatile memory (NVM) to store intermediate data. The controller is to issue commands to a first storage drive to read old data, compute the intermediate data of the first storage drive as XOR of the old data and new data received in the write command, and atomically write the intermediate data of the first storage drive to the intermediate buffer of the first storage drive and write the new data to the first storage drive's NVM. The controller is to read the intermediate data of the first storage drive from the intermediate buffer of the first storage drive. The controller is further to issue commands to one or more EC storage drives to read the old data, compute result data as the old data XOR a galois field coefficient of the one or more EC storage drives multiplied by the intermediate data, and atomically write the old data to the intermediate buffer of the one or more EC storage drives and write the result data to the one or more EC storage drive's NVM. Other embodiments are disclosed and claimed.

First claim

What is claimed is:

1. A method comprising:
receiving, by a controller having control circuitry to control local access to one or more storage drives supporting erasure coding (EC) of a computing system, a write command indicating an address and first data;
allocating an intermediate parity data buffer in a non-volatile memory (NVM) of a first storage driver of the one or more storage devices;
issuing one or more commands to the first storage drive to
read second data from the address on the first storage drive,
determine first intermediate parity data representing a combination of the first data and the second data,
write the first intermediate data to the intermediate parity data buffer according to a first index,
atomically write the new data to the first storage device at the address and store the first index in the NVM of the first storage drive, and
store the first intermediate parity data in a memory;

reading the first intermediate parity data from the memory; and
issuing one or more of the commands to a second storage drive of the one or more storage drives to
read third data from the address on the second storage drive,
determine second intermediate parity data by multiplying the third data by a Galois field coefficient of the second storage drive to generate a result and combining the result with the first intermediate parity data, and
write the second intermediate data to the intermediate parity data buffer according to a second index,
atomically write the third data to the second storage device at the address and store the second index in the NVM of the second storage drive, and
store the second intermediate parity data in a memory.

2. The method of claim 1 , wherein the one or more storage drives comprise one or more solid-state drives (SSDs), and wherein the combination comprises an XOR operation of the first data and the second data.

3. The method of claim 1 , wherein the commands are unidirectional non-volatile memory express (NVMe) commands.

4. The method of claim 1 , wherein the commands to the one or more storage drives are issued in parallel.

5. The method of claim 1 , wherein the write command is received by the controller from a storage server.

6. At least one non-transitory computer-readable medium having stored thereon instructions which, when executed, cause a computing device to perform operations comprising:
receiving, by a controller having control circuitry to control local access to one or more storage drives supporting erasure coding (EC) of a computing system, a write command indicating an address and first data;
allocating an intermediate parity data buffer in a non-volatile memory (NVM) of a first storage driver of the one or more storage devices;
issuing one or more commands to the first storage drive to
read second data from the address on the first storage drive,
determine first intermediate parity data representing a combination of the first data and the second data,
write the first intermediate data to the intermediate parity data buffer according to a first index,
atomically write the new data to the first storage device at the address and store the first index in the NVM of the first storage drive, and
store the first intermediate parity data in a memory; reading the first intermediate parity data from the memory; and

issuing one or more of the commands to a second storage drive of the one or more storage drives to
read third data from the address on the second storage drive,
determine second intermediate parity data by multiplying the third data by a Galois field coefficient of the second storage drive to generate a result and combining the result with the first intermediate parity data, and
write the second intermediate data to the intermediate parity data buffer according to a second index,
atomically write the third data to the second storage device at the address and
store the second index in the NVM of the second storage drive, and store the second intermediate parity data in a memory.

7. The computer-readable medium of claim 6 , wherein the one or more storage drives comprise one or more solid-state drives (SSDs), and wherein the combination comprises an XOR operation of the first data and the second data.

8. The computer-readable medium of claim 6 , wherein the commands are unidirectional non-volatile memory express (NVMe) commands.

9. The computer-readable medium of claim 6 , wherein the commands to the one or more EC storage drives are issued in parallel.

10. The computer-readable medium of claim 6 , wherein the write command is received from a storage server.

11. An apparatus comprising: one or more storage drives supporting erasure coding (EC); and
a controller having control circuitry to control local access to the one or more storage drives, and in response to a write command, the write command indicating an address and first data, the control circuitry is configured to:
allocate an intermediate parity data buffer in a non-volatile memory (NVM) of a first storage driver of the one or more storage devices;
issue one or more commands to the first storage drive to
read second data from the address on the first storage drive,
determine first intermediate parity data representing a combination of the first data and the second data,
write the first intermediate data to the intermediate parity data buffer according to a first index,
atomically write the new data to the first storage device at the address and store the first index in the NVM of the first storage drive, and
store the first intermediate parity data in a memory;
read the first intermediate parity data from the memory; and

issue one or more of the commands to a second storage drive of the one or more storage drives to
read third data from the address on the second storage drive,
determine second intermediate parity data by multiplying the third data by a Galois field coefficient of the second storage drive to generate a result and combining the result with the first intermediate parity data, and
write the second intermediate data to the intermediate parity data buffer according to a second index,
atomically write the third data to the second storage device at the address and store the second index in the NVM of the second storage drive, and
store the second intermediate parity data in a memory.

12. The apparatus of claim 11 , wherein the one or more storage drives comprise one or more solid-state drives (SSDs), and wherein the combination comprises an XOR operation of the first data and the second data.

13. The apparatus of claim 11 , wherein the commands comprise unidirectional non-volatile memory express (NVMe) commands.

14. The apparatus of claim 11 , wherein the commands to the one or more storage drives are issued in parallel.

15. The apparatus of claim 11 , wherein the write command is received from a storage server.

Assignees

• Intel Corp

Inventors

• Wysocki Piotr
• Trika Sanjeev N
• Tucker Gregory B
• Ellis Jackson
• Hughes Jonathan M

Classifications

• G06F3/0659

  Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

• G06F3/0688

  Non-volatile semiconductor memory arrays · CPC title

• G06F3/0608

  Saving storage space on storage systems · CPC title

• G06F9/30029

  Logical and Boolean instructions, e.g. XOR, NOT · CPC title

• G06F3/0656

  Data buffering arrangements · CPC title