Package structure, packaging method, camera module, and electronic equipment

Patent metadata

Field	Value
Publication number	US-12107101-B2
Application number	US-202117546740-A
Country	US
Kind code	B2
Filing date	Dec 9, 2021
Priority date	Jun 30, 2021
Publication date	Oct 1, 2024
Grant date	Oct 1, 2024

Abstract

The present disclosure provides chip package structure, packaging method, camera module and electronic equipment. The package structure includes chip package module, which includes light-transmitting substrate, wiring layer located on side of light-transmitting substrate and including first metal wire, conductor located on side of wiring layer facing away from light-transmitting substrate, photosensitive chip located on side of wiring layer facing away from the light-transmitting substrate, active chip located on side of wiring layer facing away from light-transmitting substrate, and plastic encapsulation layer encapsulating photosensitive chip and active chip. The conductor includes first end electrically connected to first metal wire, and second end. The photosensitive chip includes pin electrically connected to first metal wire and has photosensitive surface facing towards light-transmitting substrate. The photosensitive surface includes photosensitive region that is not overlapping first metal wire. The active chip includes pin electrically connected to first metal wire.

First claim

What is claimed is:

1. A package structure, comprising a chip package module, wherein the chip package module comprises:
light-transmitting substrate;
a wiring layer located on a side of the light-transmitting substrate and comprising a first metal wire, wherein the wiring layer is directly formed on the side of the light-transmitting substrate in a form of film;
a conductor located on a side of the wiring layer facing away from the light-transmitting substrate, wherein the conductor comprises a first end electrically connected to the first metal wire, and a second end;
a photosensitive chip located on the side of the wiring layer facing away from the light-transmitting substrate, wherein the photosensitive chip comprises a pin electrically connected to the first metal wire and having a photosensitive surface configured to sense a photometric signal, and the photosensitive surface faces towards the light-transmitting substrate and comprises a photosensitive region that is not overlapping the first metal wire in a direction perpendicular to a principal plane of the light-transmitting substrate;
an active chip located on the side of the wiring layer facing away from the light-transmitting substrate and comprising a pin electrically connected to the first metal wire; and
an encapsulation layer that encapsulates the photosensitive chip and the active chip.

2. The package structure of claim 1 , wherein the chip package module further comprises an infrared filter film located on a side of the light-transmitting substrate, and the infrared filter film overlaps the photosensitive region in the direction perpendicular to the principal plane of the light-transmitting substrate.

3. The package structure of claim 2 , wherein the infrared filter film is located on a side of the light-transmitting substrate facing away from the photosensitive chip.

4. The package structure of claim 1 , further comprising:
a first circuit board bound to the chip package module and located on a side of the encapsulation layer facing away from the light-transmitting substrate, wherein the first circuit board comprises at least one second metal wire electrically connected to the second end of the conductor.

5. The package structure of claim 4 , further comprising:
a passive electronic device fixed on the first circuit board and comprising a pin electrically connected to the at least one second metal wire.

6. The package structure of claim 4 , wherein the first circuit board is a flexible circuit board and has a first connection region close to an edge of the first circuit board, and one of the at least one second metal wire that is located in the first connection region is configured to be directly electrically connected to an external signal processing device.

7. The package structure of claim 6 , further comprising:
a support plate located on a side of the first circuit board facing away from the chip package module, wherein the support plate does not overlap the first connection region in a direction perpendicular to a principal plane of the first circuit board.

8. The package structure of claim 4 , wherein the first circuit board is a rigid circuit board having a second connection region close to an edge of the first circuit board, and
the package structure further comprises a second circuit board, and the second circuit board is a flexible circuit board and comprises a pin electrically connected one of the at least one second metal wire located in the second connection region, and the second circuit board is configured to be electrically connected to an external signal processing device.

9. The package structure of claim 4 , wherein an accommodating cavity is provided between a surface of the encapsulation layer facing away from the light-transmitting substrate and a surface of the first circuit board facing towards the light-transmitting substrate, and a support layer is provided in the accommodating cavity.

10. The package structure of claim 1 , wherein the chip package module further comprises a passive electronic device located on the side of the wiring layer facing away from the light-transmitting substrate, wherein the passive electronic device comprises a pin electrically connected to the first metal wire.

11. The package structure of claim 1 , wherein the wiring layer further comprises an interlayer dielectric layer having a hollow region, and the hollow region overlaps the photosensitive region in a direction perpendicular to a principal plane of the photosensitive chip.

12. The package structure of claim 11 , wherein the hollow region covers the photosensitive region in the direction perpendicular to the principal plane of the photosensitive chip.

13. The package structure of claim 1 , wherein the chip package module further comprises a light shielding layer located on a side of the light-transmitting substrate facing towards the photosensitive chip or located on a side of the light-transmitting substrate facing away from the photosensitive chip, wherein a projection of the light shielding layer on a plane of the photosensitive chip surrounds the photosensitive region and does not overlap the photosensitive region in a direction perpendicular to the principal plane of the photosensitive chip.

14. The package structure of claim 1 , wherein a minimum distance between a projection of the first metal wire on a plane of the photosensitive chip and the photosensitive region is L, where L≥0.05 mm.

15. The package structure of claim 1 , wherein the package structure comprises an anti-oxidation layer located on the side of the wiring layer facing away from the light-transmitting substrate, and wherein the anti-oxidation layer covers the first metal wire of the wiring layer, and wherein the first metal wire is at least partially exposed outside of the wiring layer.

16. The package structure of claim 1 , wherein the chip package module further comprises a filling adhesive filled on peripheral edges of the photosensitive chip and in contact with the wiring layer.

17. The package structure of claim 16 , wherein the filling adhesive comprises a light absorbing material or a light shielding material.

18. The package structure of claim 1 , wherein the light-transmitting substrate has a thickness of d, where 0.05 mm≤d≤0.7 mm.

19. A camera module, comprising:
a package structure having a chip package module, wherein the chip package module comprises:
light-transmitting substrate;
a wiring layer located on a side of the light-transmitting substrate and comprising a first metal wire, wherein the wiring layer is directly formed on the side of the light-transmitting substrate in a form of film;
a conductor located on a side of the wiring layer facing away from the light-transmitting substrate, wherein the conductor comprises a first end electrically connected to the first metal wire, and a second end;
a photosensitive chip located on the side of the wiring layer facing away from the light-transmitting substrate, wherein the photosensitive chip comprises a pin electrically connected to the first metal wire and having a photosensitive surface configured to sense a photometric signal, and the photosensitive surface faces towards the light-transmitting substrate and comprises a photosensitive region that is not overlapping the first metal wire in a direction perpendicular to a principal plane of the light-transmitting substrate;
an active chip located on the side of the wiring layer facing away from the light-transmitting substrate and comprising a pin electrically connected

Assignees

• Shanghai Avic Opto Electronics Co Ltd
• Shanghai Tianma Micro Elect Co

Inventors

• Xi Kerui
• Peng Xuhui
• Qin Feng
• Cui Tingting
• Jia Zhenyu

Classifications

• H10W90/00

  Package configurations · CPC title

• H10W70/69

  Insulating materials thereof · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title

• H10W74/012

  of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills · CPC title

• H10W74/114 Primary

  by a substrate and the encapsulations · CPC title