Electronic device to enhance randomness of security module using multiple hardware random number generator and the method thereof

Patent metadata

Field	Value
Publication number	US-12095911-B2
Application number	US-202217689157-A
Country	US
Kind code	B2
Filing date	Mar 8, 2022
Priority date	Apr 7, 2021
Publication date	Sep 17, 2024
Grant date	Sep 17, 2024

Abstract

An electronic device according to an embodiment includes a first random number generator module, a second random number generator module, a buffer memory configured to store random number data, and a processor configured to be operatively connected to the first random number generator module, the second random number generator module, and the buffer memory, wherein the processor is configured to acquire a first random number sequence from the first random number generator module to store the acquired first random number sequence in the buffer memory, generate a third random number sequence obtained by changing the first random number sequence based on a second random number sequence acquired from the second random number generator module, and generate an encryption key based on the third random number sequence. In addition, various other embodiments are possible.

First claim

The invention claimed is:

1. An electronic device comprising:
a first random number generator circuitry;
a second random number generator circuitry;
a buffer memory including a character device node;
one or more processors; and
memory storing instructions that, when executed by the one or more processors, cause the electronic device to:
control the first random number generator circuitry to obtain a first non-deterministic random number sequence,
determine an entropy count value corresponding to a size of entropy of the first non-deterministic random number sequence,
in accordance with the entropy count value being greater than or equal to a predetermined value, transmit the first non-deterministic random number sequence to the character device node,
control the second random number generator circuitry to obtain a second non-deterministic random number sequence,
generate a third random number sequence by changing the first non-deterministic random number sequence stored in the character device node based on the second non-deterministic random number sequence, and
generate an encryption key based on the third random number sequence.

2. The electronic device of claim 1 , wherein the instructions, when executed by the one or more processors, cause the electronic device to, in accordance with the entropy count value being less than to the predetermined value;
control the first random number generator circuitry to obtain a fourth non-deterministic random number sequence, and
repeat the determining of an entropy count value corresponding to a size of entropy of the fourth non-deterministic random number sequence.

3. The electronic device of claim 1 , wherein the entropy count value is maintained when the third random number sequence is generated.

4. The electronic device of claim 1 , wherein the instructions, when executed by the one or more processors, further cause the electronic device to:
calculate a size of entropy of random number data required to generate the encryption key through a predetermined algorithm,
acquire the random number data corresponding to the calculated size of entropy from the memory, and
initialize internal state information.

5. The electronic device of claim 1 , wherein the instructions, when executed by the one or more processors, further cause the electronic device to:
determine a time interval for generating the third random number sequence or at least one event for generating the third random number sequence upon occurrence of the at least one event, and
generate the third random number sequence based on the second non-deterministic random number sequence at each time interval or when the at least one event occurs.

6. The electronic device of claim 1 , wherein the instructions, when executed by the one or more processors, further cause the electronic device to generate an essential element of an encryption algorithm using the third random number sequence, wherein the essential element includes a nonce and/or an initial vector.

7. An electronic device comprising:
a first random number generator circuitry;
a second random number generator circuitry;

one or more processors; and
memory storing instructions that, when executed by the one or more processors, cause the electronic device to:
acquire a first random number sequence from the first random number generator circuitry to store the acquired first random number sequence in the memory,
acquire an entropy count value corresponding to a size of entropy of random number data stored in the memory,
calculate a required amount of random number based on a maximum capacity of the memory and the entropy count value,
acquire a second random number sequence from the second random number generator circuitry based on the required amount of random number and store the acquired second random number sequence in the memory,
generate an encryption key using the random number data stored in the memory,
increase the entropy count value in response to acquisition of the second random number sequence, and
compare the entropy count value of the memory with the maximum capacity.

8. An electronic device comprising:
a first random number generator circuitry;
a second random number generator circuitry;
one or more processors; and
memory storing instructions that, when executed by the one or more processors, cause the electronic device to:
acquire a first random number sequence from the first random number generator circuitry,
acquire a second random number sequence from the second random number generator circuitry,
generate a random number mix function for mixing random number sequences,
generate a third random number sequence by mixing the first random number sequence and the second random number sequence based on the random number mix function,
generate an encryption key based on the third random number sequence,
determine an entropy count value corresponding to a size of entropy of random number data stored in the memory, and
include a third random number generator circuitry and a security circuitry configured to store the random number mix function,
wherein the third random number generator circuitry is configured with a password generate function, and is configured to generate internal state information using the random number data.

9. The electronic device of claim 8 , wherein:
the memory further includes a character device node configured to provide the random number data to be utilized by another component in a platform, and
the one or more processors are configured to:
transmit the random number data stored in the memory to the character device node when the entropy count value is greater than or equal to a predetermined value, and
further acquire the first random number sequence from the first random number generator circuitry without transmitting the random number data stored in the memory to the character device node when the entropy count value is less than the predetermined value.

10. The electronic device of claim 8 , wherein the one or more processors is configured to:
calculate an amount of the random number data required to generate the encryption key through a predetermined algorithm,
acquire the random number data corresponding to the calculated amount of random number data from the memory, and
initialize the internal state information.

11. The electronic device of claim 8 , wherein the one or more processors is configured to:
input a result obtained by inputting the internal state information to the password generate function, to the random number mix function, and
input the second random number sequence to the random number mix function to generate the third random number sequence.

12. The electronic device of claim 8 , wherein the one or more processors is configured to:
generate the third random number sequence by inputting the internal state information and the second random number sequence to the password generate function.

13. The electronic device of claim 8 , wherein the one or more processors is configured to generate the third random number sequence using a random number mix function that concatenates half of the first random number sequence and half of the second random number sequence.

14. The electronic device of claim 8 , wherein the one or more processors is configured to generate the third random number sequence using a random number mix function that performs a logical operation on the first random number sequence and the second random number sequence.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Paik Jungha
• Kim Bumhan
• Kim Jeongil
• Ahn Jonghyun
• Lee Jaeyoon
• Jeong Hoyong

Classifications

• G06F7/588 Primary

  Random number generators, i.e. based on natural stochastic processes · CPC title

• H04L9/0869 Primary

  involving random numbers or seeds · CPC title