Systems and methods for efficient error mitigation in quantum circuit execution using parity checks and classical feedback

US12093128B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12093128-B2
Application numberUS-202218060235-A
CountryUS
Kind codeB2
Filing dateNov 30, 2022
Priority dateNov 30, 2022
Publication dateSep 17, 2024
Grant dateSep 17, 2024

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Systems and methods for efficient error mitigation in quantum circuit execution using parity checks and classical feedback are disclosed. A method may include a quantum computer: executing a quantum optimization algorithm comprising measurement points for measuring a quantum state parity, and termination instructions for stopping execution of the quantum optimization algorithm; preparing the quantum state; executing a first step of the quantum optimization algorithm; measuring a first parity of the quantum state; returning the first parity to a classical computer program; executing a second step of the quantum optimization algorithm; measuring a second parity of the quantum state; returning the second parity to the classical computer program that is configured to compare the first parity and the second parity; receiving an instruction to execute the termination instructions from the classical computer program in response to first parity and the second parity being different; and executing the termination instructions.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for efficient error mitigation in quantum circuit execution, comprising: executing, by a quantum computer, a quantum circuit for a quantum optimization algorithm, the quantum circuit comprising a plurality of measurement points for measuring a parity of a quantum state, and termination instructions for stopping execution of the quantum optimization algorithm; preparing, by the quantum computer, the quantum state; executing, by the quantum computer, a first step of the quantum optimization algorithm; measuring, by the quantum computer, a first parity of the quantum state; returning, by the quantum computer, the first parity to a classical computer program; executing, by the quantum computer, a second step of the quantum optimization algorithm; measuring, by the quantum computer, a second parity of the quantum state; returning, by the quantum computer, the second parity to the classical computer program, wherein the classical computer program is configured to compare the first parity and the second parity; receiving, by the quantum computer, an instruction to execute the termination instructions from the classical computer program in response to first parity and the second parity being different; and executing, by the quantum computer, the termination instructions. 2. The method of claim 1 , wherein the quantum state is a Dicke state. 3. The method of claim 1 , wherein the quantum computer measures the first parity and the second parity by: initializing an auxiliary qubit; applying a Hadamard gate; applying a control on the auxiliary qubit; applying a Hadamard gate a second time; and measuring the auxiliary qubit. 4. The method of claim 1 , wherein the quantum optimization algorithm comprises the Quantum Approximate Optimization Algorithm. 5. The method of claim 1 , further comprising: continuing to execute, by the quantum computer, the quantum optimization algorithm in response to the first parity of the quantum state and the second parity of the quantum state being the same. 6. A method for efficient error mitigation in quantum circuit execution, comprising: executing, by a quantum computer, a quantum circuit for a quantum optimization algorithm, the quantum circuit comprising a plurality of measurement points for measuring a parity of a quantum state, and termination instructions for stopping execution of the quantum optimization algorithm; measuring, by the quantum computer, a first parity of the quantum state; returning, by the quantum computer, the first parity to a classical computer program; executing, by the quantum computer, a phase operator; measuring, by the quantum computer, a second parity of the quantum state; returning, by the quantum computer, the second parity to the classical computer program, wherein the classical computer program is configured to compare the first parity and the second parity; receiving, by the quantum computer, an instruction to execute the termination instructions from the classical computer program in response to first parity and the second parity being different; and executing, by the quantum computer, the termination instructions. 7. The method of claim 6 , wherein the phase operator comprises a product of ZZ gates. 8. The method of claim 6 , wherein the first parity of the quantum state and the second parity of the quantum state are measured by an operator comprising a tensor product of single-qubit Pauli Z operators. 9. The method of claim 6 , wherein the quantum optimization algorithm comprises the Quantum Approximate Optimization Algorithm. 10. The method of claim 6 , further comprising: continuing to execute, by the quantum computer, the quantum optimization algorithm in response to the first parity of the quantum state and the second parity of the quantum state being unchanged. 11. A method for efficient error mitigation in quantum circuit execution, comprising: executing, by a quantum computer, a first step in a quantum optimization algorithm comprising measurement points for measuring a parity of integer variable states and termination instructions for stopping execution of the quantum optimization algorithm, wherein integers in the quantum optimization algorithm are represented using one-hot encoding; measuring, by the quantum computer, a parity for each of the integer variables; returning, by the quantum computer, the parities to a classical computer program, wherein the classical computer program is configured to evaluate the parities; receiving, by the quantum computer, an instruction to execute the termination instructions from the classical computer program in response to one of the parities having a value other than a first value; and executing, by the quantum computer, the termination instructions. 12. The method of claim 11 , wherein the value is −1. 13. The method of claim 11 , wherein the quantum optimization algorithm comprises the Quantum Approximate Optimization Algorithm. 14. The method of claim 11 , wherein the parity for each of the integer variables is measured using an operator comprising a tensor product of single-qubit Pauli Z operators. 15. The method of claim 11 , further comprising: continuing to execute, by the quantum computer, the quantum optimization algorithm in response to the parities having the first value.

Assignees

Inventors

Classifications

  • G06F11/10Primary

    Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US12093128B2 cover?
Systems and methods for efficient error mitigation in quantum circuit execution using parity checks and classical feedback are disclosed. A method may include a quantum computer: executing a quantum optimization algorithm comprising measurement points for measuring a quantum state parity, and termination instructions for stopping execution of the quantum optimization algorithm; preparing the qu…
Who is the assignee on this patent?
Jpmorgan Chase Bank Na
What technology area does this patent fall under?
Primary CPC classification G06F11/10. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 17 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).