Systems and methods for real-time frequency shift detection

Patent metadata

Field	Value
Publication number	US-12088441-B2
Application number	US-202318149246-A
Country	US
Kind code	B2
Filing date	Jan 3, 2023
Priority date	Jan 3, 2023
Publication date	Sep 10, 2024
Grant date	Sep 10, 2024

Abstract

Systems and methods disclosed herein include a correction circuit. The correction circuit may include signal conditioning circuitry that is configured to condition a received reference signal. The correction circuit may include a filter that is configured to filter the conditioned signal received from the signal conditioning circuitry. The correction circuit may include phase detector circuitry that is configured to generate at least one output signal based on measuring a phase shift between a received plurality of input signals. At least one of the plurality of input signals may include the conditioned signal received from the filter.

First claim

What is claimed is:

1. A correction circuit, comprising:
signal conditioning circuitry that is configured to condition a received reference signal;
a filter that is configured to filter the conditioned signal received from the signal conditioning circuitry; and
phase detector circuitry that is configured to generate at least one output signal based on measuring a phase shift between a received plurality of input signals, at least one of the plurality of input signals comprising the conditioned signal received from the filter.

2. The correction circuit of claim 1 , wherein the reference signal includes a reference clock signal.

3. The correction circuit of claim 1 , wherein the phase detector circuitry is configured to receive a first input signal of the plurality of input signals, the first input signal comprising a signal that is not passed through the filter.

4. The correction circuit of claim 3 , wherein the phase detector circuitry is configured to receive a second input signal of the plurality of input signals, the second input signal comprising the conditioned signal that is filtered by the filter.

5. The correction circuit of claim 1 , wherein the signal conditioning circuitry is configured to condition the reference signal by waveform manipulation including at least one selected from waveform squaring, amplitude modification, and frequency division or multiplication.

6. The correction circuit of claim 1 , wherein the phase detector circuitry is configured to generate the at least one output signal including a frequency correction signal.

7. The correction circuit of claim 1 , wherein the at least one output signal is a direct function of the reference signal.

8. The correction circuit of claim 1 , wherein the filter comprises an analog filter.

9. The correction circuit of claim 8 , wherein the analog filter comprises a bandpass filter.

10. The correction circuit of claim 1 , wherein the filter comprises a digital filter.

11. The correction circuit of claim 10 , wherein the digital filter comprises a discrete-time filter.

12. The correction circuit of claim 10 , further comprising a converter that is connected between the signal conditioning circuitry and the digital filter.

13. The correction circuit of claim 1 , wherein the filter comprises a mechanical resonator filter.

14. The correction circuit of claim 13 , further comprising drive circuitry and sense circuitry.

15. The correction circuit of claim 14 , wherein the phase detector circuitry is configured to receive an output directly from the drive circuitry.

16. The correction circuit of claim 1 , wherein the phase detector circuitry is configured to detect a phase delta that represents a shift in input-to-output phase relative to a nominal value.

17. The correction circuit of claim 1 , wherein a type of the signal conditioning circuitry depends on a type of the filter.

18. A method comprising:
transmitting a reference signal;
conditioning the reference signal;
filtering the conditioned reference signal;
transmitting the filtered conditioned signal;
measuring a phase shift between the filtered conditioned signal and a second signal;
generating an output signal including a frequency correction signal; and
transmitting the frequency correction signal.

19. An oscillator comprising:
a mechanical resonator;
a correction circuit; and
output conditioner circuitry, wherein the correction circuit includes:
signal conditioning circuitry that is configured to condition a reference signal received from the mechanical resonator;
a filter that is configured to filter the conditioned signal received from the signal conditioning circuitry; and
phase detector circuitry that is configured to generate at least one output signal based on measuring a phase shift between a received plurality of input signals, at least one of the plurality of input signals comprising the conditioned signal received from the filter, the phase detector circuitry further configured to transmit the at least one output signal to the output conditioner circuitry.

20. The oscillator of claim 19 , wherein the oscillator is a temperature compensated oscillator.

Assignees

• Panasonic Ip Man Co Ltd

Inventors

• YOUNKIN Duane

Classifications

• H04L27/2657 Primary

  Carrier synchronisation · CPC title

• H04L27/127 Primary

  using a controlled oscillator in a feedback loop · CPC title