Chip multi-layer transformer and inductor

Patent metadata

Field	Value
Publication number	US-12087491-B2
Application number	US-202318200062-A
Country	US
Kind code	B2
Filing date	May 22, 2023
Priority date	Mar 30, 2018
Publication date	Sep 10, 2024
Grant date	Sep 10, 2024

Abstract

An inductance apparatus includes a first winding comprising a first wire section and a second wire section. The first wire section and the second wire section are disposed in a first horizontal plane associated with a center axis, and the first winding is associated with an equivalent current flow path within the first horizontal plane; a second winding extends via the center axis in the first horizontal plane to the first wire section and the second wire section, wherein the equivalent current flow path of the first winding is aligned with a current flow path associated with the second winding.

First claim

What is claimed:

1. An inductance apparatus, comprising:
a first winding comprising a first wire section and a second wire section, the first wire section and the second wire section are disposed in a first horizontal plane associated with a center axis, and the first winding associated with an equivalent current flow path within the first horizontal plane;
a second winding to extend via the center axis in the first horizontal plane to the first wire section and the second wire section, wherein the equivalent current flow path of the first winding is aligned with a current flow path associated with the second winding.

2. The apparatus of claim 1 , further comprising at least one wire section extending from the second winding and disposed on a second horizontal plane, the second horizontal plane being parallel to the first horizontal plane.

3. The apparatus of claim 1 , wherein the first winding is provided on a first layer and the first winding is coupled to a second layer.

4. The apparatus of claim 3 , wherein at least one of the first layer or the second layer is made of metal with substantially high conductivity.

5. The apparatus of claim 3 , wherein each one of the first layer and the second layer is made of metal with substantially high conductivity.

6. The apparatus of claim 1 , further comprising a plus node and a minus node interconnected to the first winding by a via.

7. The apparatus of claim 1 , wherein the first and second wire sections are metal traces.

8. The apparatus of claim 1 , wherein the second winding is a metal trace.

9. The apparatus of claim 1 , wherein the first winding has at least two turns.

10. The apparatus of claim 9 , wherein the second winding has at least two turns.

11. The apparatus of claim 1 , wherein the equivalent current path is disposed between the first wire section and the second wire section.

12. The apparatus of claim 1 , wherein the second winding is interconnected to a center tap by at least one interconnection element.

13. The apparatus of claim 12 , wherein the at least one interconnection element comprises a via.

14. The apparatus of claim 1 , wherein the secondary winding is equidistant from the first wire section and the second wire section.

15. The apparatus of claim 1 , wherein the primary winding and the secondary winding in the first horizontal plane are the same metallic material.

16. The apparatus of claim 1 , further comprising a connection element connecting the first winding with the second winding with interconnection elements.

17. The apparatus of claim 1 , wherein the first section and the second wire section are disposed parallel to each other.

18. A method of manufacturing an inductance apparatus, the method comprising:
placing a first winding comprising a first wire section and a second wire section, the first wire section and the second wire section are disposed in a first horizontal plane associated with a center axis, and the first winding associated with an equivalent current flow path within the first horizontal plane;
placing a second winding to extend via the center axis in the first horizontal plane to the first wire section and the second wire section, wherein the equivalent current flow path of the first winding is aligned with a current flow path associated with the second winding.

19. The method of claim 18 , further comprising providing at least one wire section extending from the second winding, wherein the at least one wire section disposed on a second horizontal plane, the second horizontal plane being parallel to the first horizontal plane.

20. The method of claim 18 , further comprising providing the first winding on a first layer wherein the first winding is coupled to a second layer.

21. The method of claim 20 , wherein at least one of the first layer or the second layer is made of metal with substantially high conductivity.

22. The method of claim 20 , wherein each one of the first layer and the second layer is made of metal with substantially high conductivity.

23. The method of claim 17 , further comprising extending the first winding from a plus node to a minus node.

24. The method of claim 18 , wherein the first and second wire sections are metal traces.

25. The method of claim 18 , wherein the second winding is a metal trace.

26. The method of claim 18 , wherein the first winding has at least two turns.

27. The method of claim 26 , wherein the second winding has at least two turns.

28. The method of claim 18 , further comprising disposing the equivalent current path between the first wire section and the second wire section.

29. The method of claim 18 , further comprising connecting the second winding to a center tap by at least one interconnection element.

30. The method of claim 29 , wherein the at least one interconnection element comprises a via.

31. The method of claim 18 , further comprising providing the secondary winding equidistant from the first wire section and the second wire section.

32. The method of claim 18 , wherein the primary winding and the secondary winding in the first horizontal plane are the same metallic material.

33. The method of claim 18 , providing a connection element connecting the first winding with the second winding with interconnection elements.

34. The method of claim 18 , wherein the first section and the second wire section are disposed parallel to each other.

35. An integrated on-chip inductor comprising:
a first winding comprising a first wire section and a second wire section, the first wire section and the second wire section are disposed in a first horizontal plane associated with a center axis, and the first winding associated with an equivalent current flow path within the first horizontal plane;
a second winding to extend via the center axis in the first horizontal plane to the first wire section and the second wire section, wherein the equivalent current flow path of the first winding is aligned with a current flow path associated with the second winding.

36. The integrated on-chip inductor of claim 35 , wherein the first section and the second wire section are disposed parallel to each other.

37. An inductance apparatus comprising:
a first winding means comprising a first wire section and a second wire section, the first wire section and the second wire section are disposed in a first horizontal plane associated with a center axis, and the first winding means associated with an equivalent current flow path within the first horizontal plane;
a second winding means for extending via the center axis in the first horizontal plane to the first wire section and the second wire section, wherein the equivalent current flow path of the first winding is aligned with a current flow path associated with the second winding.

38. The inductance apparatus of claim 37 , further comprising a connection means for connecting the first winding means with the second winding means via interconnection elements.

Assignees

• Intel Corp

Inventors

• Yu Chuanzhao
• Li Qiang
• Newman David

Classifications

• H10W44/248

  for antennas · CPC title

• H10W44/20

  at high-frequency [HF] or radio frequency [RF] · CPC title

• H10W44/501

  Inductive arrangements (H10W44/20 takes precedence) · CPC title

• H01F2027/2809

  on stacked layers · CPC title

• H01F41/041

  Printed circuit coils (apparatus or processes for manufacturing printed circuits in general H05K3/00) · CPC title