Processor-endpoint isolation in communication switch coupled computing system

Patent metadata

Field	Value
Publication number	US-12086089-B2
Application number	US-202318481319-A
Country	US
Kind code	B2
Filing date	Oct 5, 2023
Priority date	Apr 25, 2014
Publication date	Sep 10, 2024
Grant date	Sep 10, 2024

Abstract

Systems, methods, apparatuses, and software for computing systems are provided herein. In one example, a system includes a processor configured to communicate over a network interface and a processor peripheral communication interface. The system includes communication switch circuitry communicatively coupling the processor peripheral communication interface and a device peripheral communication interface of an endpoint device. The communication switch circuitry is configured to establish logical isolation among ports of the communication switch circuitry by instantiating visibility over the logical isolation among the processor and the endpoint device. The processor is configured to determine transactions received over the network interface are targeted for the endpoint device, and transfer at least data of the transactions over the communication switch circuitry for receipt by the endpoint device.

First claim

What is claimed is:

1. A system, comprising:
a processor configured to communicate over a network interface and a processor peripheral communication interface;
communication switch circuitry communicatively coupling the processor peripheral communication interface and a device peripheral communication interface of an endpoint device;
the communication switch circuitry configured to establish logical isolation among ports of the communication switch circuitry by instantiating visibility over the logical isolation among the processor and the endpoint device; and
the processor configured to determine transactions received over the network interface are targeted for the endpoint device, and transfer at least data of the transactions over the communication switch circuitry for receipt by the endpoint device.

2. The system of claim 1 , wherein the endpoint device comprises at least one among a graphics processing unit (GPU) and Peripheral Component Interconnect Express (PCIe) graphics card.

3. The system of claim 1 , wherein the processor peripheral communication interface and the device peripheral communication interface each comprise a Peripheral Component Interconnect Express (PCIe) interface.

4. The system of claim 1 , wherein the network interface comprises an Ethernet interface.

5. The system of claim 1 , wherein the transactions comprise read transactions or write transactions.

6. The system of claim 1 , comprising:
a storage module configured to store data and comprising an additional device peripheral communication interface;
the communication switch circuitry communicatively coupling the processor peripheral communication interface, the device peripheral communication interface, and the additional device peripheral communication interface;
the processor configured to determine further transactions received over the network interface are targeted for the storage module, and transfer at least data of the further transactions over the communication switch circuitry for receipt by the storage module.

7. The system of claim 1 , comprising:
the processor configured to receive a first transaction, determine if the first transaction corresponds to the endpoint device managed by the processor, and based at least on the first transaction not corresponding to the endpoint device, transfer the first transaction over the communication switch circuitry to another processor that manages at least another endpoint device that corresponds to the first transaction.

8. The system of claim 7 , wherein the processor is in a first enclosure and the endpoint device is in a second enclosure different than that of the processor; and
wherein the processor transfers the first transaction over a link associated with the communication switch circuitry coupled between the first enclosure and the different enclosure.

9. The system of claim 1 , wherein the processor is in a first enclosure and the endpoint device is in a second enclosure different than that of the processor; and comprising:
the processor configured to receive the transactions and transfer at least the data of the transactions over a link coupled between the first enclosure and the different enclosure.

10. The system of claim 9 , wherein the link comprises an Ethernet link.

11. A method, comprising:
in a processor, determining transactions received over a network interface which are targeted for an endpoint device, and transferring, for receipt by the endpoint device, at least data of the transactions over a processor peripheral communication interface using logical isolation established in communication switch circuitry between the processor and the endpoint device;
in the communication switch circuitry, communicatively coupling the processor peripheral communication interface and a device peripheral communication interface of the endpoint device by at least instantiating the logical isolation among ports of the communication switch circuitry to establish visibility for the processor to access the endpoint device over the logical isolation.

12. The method of claim 11 , wherein the endpoint device comprises at least one among a graphics processing unit (GPU) and Peripheral Component Interconnect Express (PCIe) graphics card.

13. The method of claim 11 , wherein the processor peripheral communication interface and the device peripheral communication interface each comprise a Peripheral Component Interconnect Express (PCIe) interface.

14. The method of claim 11 , wherein the network interface comprises an Ethernet interface.

15. The method of claim 11 , wherein the transactions comprise read transactions or write transactions.

16. The method of claim 11 , comprising:
in the communication switch circuitry, communicatively coupling the processor peripheral communication interface, the device peripheral communication interface, and an additional device peripheral communication interface corresponding to a storage module;
by the processor, determining further transactions received over the network interface are targeted for the storage module, and transfer at least data of the further transactions over the communication switch circuitry for receipt by the storage module.

17. The method of claim 11 , comprising:
by the processor, receiving a first transaction, determining if the first transaction corresponds to the endpoint device managed by the processor, and based at least on the first transaction not corresponding to the endpoint device, transferring the first transaction over the communication switch circuitry to another processor that manages at least another endpoint device that corresponds to the first transaction.

18. The method of claim 17 , wherein the processor is in a first enclosure and the endpoint device is in a second enclosure different than that of the processor; and
wherein the processor transfers the first transaction over a link associated with the communication switch circuitry coupled between the first enclosure and the different enclosure.

19. The method of claim 11 , wherein the processor is in a first enclosure and the endpoint device is in a second enclosure different than that of the processor; and comprising:
by the processor, receiving the transactions and transferring at least the data of the transactions over a link coupled between the first enclosure and the different enclosure.

20. The method of claim 19 , wherein the link comprises an Ethernet link.

Assignees

• Liqid Inc

Inventors

• Long Christopher R
• Breakstone Jason

Classifications

• G05B11/01

  electric · CPC title

• G06F3/0625

  Power saving in storage systems · CPC title

• Y02E30/30

  Nuclear fission reactors · CPC title

• G21D1/02

  Arrangements of auxiliary equipment · CPC title

• Y02D10/00

  Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title