Abnormality detection apparatus for resolver

Patent metadata

Field	Value
Publication number	US-12085418-B2
Application number	US-202017792288-A
Country	US
Kind code	B2
Filing date	Feb 26, 2020
Priority date	Feb 26, 2020
Publication date	Sep 10, 2024
Grant date	Sep 10, 2024

Abstract

To provide an abnormality detection apparatus for resolver which can determine the abnormality of at least the first system, even if the period of the excitation AC voltage of the first system and the period of the excitation AC voltage of the second system are different periods, and the magnetic interference between systems occurs. An abnormality detection apparatus for resolver applies an AC voltage of a first period to a first system excitation winding; applies an AC voltage of a second period different from the first period to a second system excitation winding; calculates DC values of first system two output signals by performing a DC extraction processing; and determines abnormality of first system based on whether or not the DC values of first system two output signals are within a normal range.

First claim

What is claimed is:

1. An abnormality detection apparatus for resolver comprising:
a resolver that is provided with a first system excitation winding, first system two output windings, a second system excitation winding, and second system two output windings, in which magnetic interference occurs between a first system and a second system;
a first system exciter that applies AC voltage of a first period to the first system excitation winding;
a second system exciter that applies AC voltage of a second period different from the first period, to the second system excitation winding;
a first system output signal detector that detects output signals of the first system two output windings at a period less than or equal to half of the first period;
a first system reduction processor that performs a second period component reduction processing which reduces component of the second period, to detection values of the output signals of the first system two output windings;
a first system DC extraction processor that calculates DC values of the first system two output signals, by performing a DC extraction processing which reduces component of the first period, to the detection values of output signals of first system two output windings after the second period component reduction processing; and
a first system abnormality detector that determines abnormality of first system, based on whether or not the DC values of first system two output signals are within a preliminarily set normal range of first system.

2. The abnormality detection apparatus for resolver according to claim 1 ,
wherein, when a case where the DC values of first system two output signals are not within the normal range of first system occurs continuously a preliminarily set abnormality determination frequency or more, the first system abnormality detector determines that abnormality occurs in the first system.

3. The abnormality detection apparatus for resolver according to claim 1 ,
wherein the first system DC extraction processor calculates the DC values of first system two output signals, by performing a moving average processing during a period of a natural number times of the first period, to the detection values of output signals of first system two output windings after the second period component reduction processing.

4. The abnormality detection apparatus for resolver according to claim 1 ,
wherein the first system output signal detector detects the output signals of first system two output windings at a detection timing of every half period of the first period when the AC voltage of the first period applied to the first system excitation winding becomes the maximum value or the minimum value, and
wherein the first system DC extraction processor calculates, as the DC values of first system two output signals, average values of the detection values of output signals of first system two output windings after the second period component reduction processing calculated at this time detection timing, and the detection values of output signals of first system two output windings after the second period component reduction processing calculated at the last time detection timing.

5. The abnormality detection apparatus for resolver according to claim 1 ,
wherein the second period is set longer than the first period,
wherein the first system reduction processor, as the second period component reduction processing, adds the detection values of output signals of first system two output windings detected at this time detection timing, and the detection values of output signals of first system two output windings detected at a detection timing earlier by a first system reduction processing interval than this time detection timing, and
wherein when setting the second period to TB, the first system reduction processing interval is set to TB/2+TB×M (M is an integer greater than or equal to 0).

6. The abnormality detection apparatus for resolver according to claim 5 ,
wherein when setting the first period to TA, the second period is set to TA×2×N (N is greater than or equal to 1).

7. The abnormality detection apparatus for resolver according to claim 1 , further comprising:
a second system output signal detector that detects output signals of the second system two output windings at a period less than or equal to half of the second period;
a second system reduction processor that performs a first period component reduction processing which reduces component of the first period, to detection values of the output signals of second system two output windings;
a second system DC extraction processor that calculates DC values of second system two output signals, by performing a DC extraction processing which reduces component of the second period, to the detection values of output signals of second system two output windings after the first period component reduction processing; and
a second system abnormality detector that determines abnormality of second system, based on whether or not the DC values of second system two output signals are within a preliminarily set normal range of second system.

8. The abnormality detection apparatus for resolver according to claim 7 ,
wherein, when a case where the DC values of second system two output signals are not within the normal range of second system occurs continuously a preliminarily set abnormality determination frequency or more.

9. The abnormality detection apparatus for resolver according to claim 7 ,
wherein the second system DC extraction processor calculates the DC values of second system two output signals, by performing a moving average processing during a period of a natural number times of the second period, to the detection values of output signals of second system two output windings after the first period component reduction processing.

10. The abnormality detection apparatus for resolver according to claim 7 ,
wherein the second system output signal detector detects the output signals of second system two output windings at a detection timing of every half period of the second period when the AC voltage of the second period applied to the second system excitation winding becomes the maximum value or the minimum value, and
wherein the second system DC extraction processor calculates, as the DC values of second system two output signals, average values of the detection values of output signals of second system two output windings after the first period component reduction processing calculated at this time detection timing, and the detection values of output signals of second system two output windings after the first period component reduction processing calculated at the last time detection timing.

11. The abnormality detection apparatus for resolver according to claim 7 ,
wherein the second system reduction processor performs, as the first period component reduction processing, a subtraction processing which calculates differences between the detection values of output signals of second system two output windings detected at this time detection timing and the detection values of output signals of second system two output windings detected at a detection timing earlier by a second system reduction processing interval than this time detection timing, and
wherein when setting the first period to TA, the second system reduction processing interval is set to TA×P (P is an integer greater than or equal to 1).

12. The abnormality detection apparatus for resolver according to claim 11 ,
wherein when setting the first period to TA, the second period is set to TA×2×N (N is greater than or equal to 1); and
wherein when setting the second period to TB

Assignees

• Mitsubishi Electric Corp

Inventors

• Mori Tatsuya
• Ikeda Hiroko
• Matsunaga Toshihiro
• Ikeda Kenji
• Kubo Kenta

Classifications

• G01D5/204

  by influencing the mutual induction between two or more coils (G01D5/22 takes precedence) · CPC title

• G01D3/00 Primary

  Indicating or recording apparatus with provision for the special purposes referred to in the subgroups · CPC title

• G01D5/24461 Primary

  by redundancy or plausibility · CPC title