Method for producing glass wafers for packaging electronic devices, and electronic component produced according to the method

US12084374B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12084374-B2
Application numberUS-202117161278-A
CountryUS
Kind codeB2
Filing dateJan 28, 2021
Priority dateJan 28, 2020
Publication dateSep 10, 2024
Grant dateSep 10, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method is provided for producing a patterned glass wafer for packaging electronic devices in a wafer assembly. The method includes placing a glass sheet between two mold halves and heating until the glass sheet softens, while the mold halves are pressed against one another so that the glass sheet is reshaped and forms a patterned glass wafer. The first mold half has an array of projections and the second mold half has an array of recesses. The mold halves are arranged and shaped so that the recesses and projections oppose each other. The projections introduce cavities into the glass sheet during the reshaping and with the glass flowing into the recesses of the second mold half during the reshaping. The recesses are deep enough for the glass to at least partially not come in contact therewith and to form a convexly shaped glass surface in each recess.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for producing a patterned glass wafer for packaging electronic devices in a wafer assembly, comprising: placing a glass sheet between a first mold half and a second mold half, wherein the first mold half has an array of projections and the second mold half has an array of recesses, and wherein the first and second mold halves are configured so that the recesses and projections oppose each other; and heating until the glass sheet softens while the first and second mold halves are pressed against one another so that the glass sheet is reshaped and forms the patterned glass wafer with the projections introducing cavities into the glass sheet, wherein the glass of the glass sheet opposite the cavities flows into the recesses, wherein the recesses are deep enough for the glass to at least partially not make contact therewith and so as to form a convexly shaped glass surface in each of the recesses, and wherein each projection of the array of projections has a central recess so that each projection of the array of projections has an annular shape so as to form a biconvex lens at each central recess. 2. The method of claim 1 , further comprising stamping the glass sheet with pre-stamped features prior to placing the glass sheet between the first and second mold halves. 3. The method of claim 1 , wherein the patterned glass wafer comprises a fused silica glass or silicate glass. 4. The method of claim 1 , wherein the patterned glass wafer comprises a borosilicate glass having a total content of B 2 O 3 and SiO 2 that is at least 79 percent by weight and/or a content of SiO 2 in percent by weight that is greater than a content of B 2 O 3 in percent by weight by a factor in a range from 2.5 to 5. 5. The method of claim 1 , wherein the convexly shaped glass surface in each of the recesses are fire-polished surfaces. 6. The method of claim 1 , wherein the patterned glass wafer comprises a borosilicate glass having a total content of B 2 O 3 and SiO 2 of at least 83 percent by weight. 7. The method of claim 1 , wherein the patterned glass wafer comprises a glass having a content of SiO 2 in percent by weight that is greater than a content of B 2 O 3 in percent by weight by a factor in a range from 2.8 to 4.5. 8. The method of claim 1 , further comprising: equipping a substrate wafer with a plurality of electronic devices; and bonding the substrate wafer to the patterned glass wafer so as to hermetically seal a respective one electronic device in a respective one of the convexly shaped glass surfaces in each of the recesses to define a wafer assembly. 9. The method of claim 8 , wherein the substrate wafer comprises a nitride ceramic wafer or an aluminum nitride wafer. 10. The method of claim 8 , wherein the substrate wafer has a thermal conductivity of at least 20 W/(m·K). 11. The method of claim 8 , further comprising separating the wafer assembly to obtain individual electronic components. 12. The method of claim 8 , wherein the plurality of electronic devices comprise ultraviolet emitting light-emitting diodes. 13. The method of claim 8 , wherein the step of bonding the substrate wafer to the patterned glass wafer comprises soldering with a solder selected from a group consisting of a glass solder, a metal solder, and a gold-tin solder. 14. The method of claim 8 , wherein the step of bonding the substrate wafer to the patterned glass wafer comprises locally annular fusing the substrate wafer to the patterned glass wafer. 15. The method of claim 8 , further comprising providing the substrate wafer and/or the patterned glass wafer with a patterned metal coating, wherein the step of bonding the substrate wafer to the patterned glass wafer comprises soldering using the patterned metal coating. 16. The method of claim 15 , wherein the patterned metal coating has a total layer thickness in a range from 0.1 micrometers to 20 micrometers. 17. The method of claim 15 , wherein the patterned metal coating comprises a multi-layer patterned metal coating. 18. The method of claim 15 , wherein the patterned metal coating comprises a lower layer made of a material selected from a group consisting of tungsten, chromium, and any alloys thereof and/or a final layer made of gold. 19. The method of claim 15 , wherein the step of providing the substrate wafer and/or the patterned glass wafer with the patterned metal coating comprises electroplating a layer on the substrate wafer and/or the patterned glass wafer. 20. The method of claim 19 , wherein the layer comprises nickel. 21. The method of claim 15 , wherein the step of providing the substrate wafer and/or the patterned glass wafer with the patterned metal coating comprises placing a solder preform between the substrate wafer and the patterned glass wafer. 22. The method of claim 15 , wherein the step of providing the substrate wafer and/or the patterned glass wafer with the patterned metal coating comprises vapor depositing or sputter depositing the patterned metal coating. 23. The method of claim 8 , wherein the biconvex lenses have a feature selected from a group consisting of: a volume of a respective one of the biconvex lenses that is less than or equal to a volume of a respective one of the cavities in the glass sheet, a volume of a respective one of the biconvex lenses and a volume of a respective one of the cavities differ by less than 10%, a volume of a respective one of the biconvex lenses and a volume of a respective one of the cavities differ by less than 5%, and a coefficient of linear thermal expansion of the patterned glass wafer and that of the substrate wafer differ by less than an absolute value of 5·10 −7 K −1 .

Assignees

Inventors

Classifications

  • Optical field-shaping means, e.g. lenses · CPC title

  • of packages · CPC title

  • characterised by their shape · CPC title

  • Coatings, e.g. passivation layers or antireflective coatings · CPC title

  • Containers · CPC title

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What does patent US12084374B2 cover?
A method is provided for producing a patterned glass wafer for packaging electronic devices in a wafer assembly. The method includes placing a glass sheet between two mold halves and heating until the glass sheet softens, while the mold halves are pressed against one another so that the glass sheet is reshaped and forms a patterned glass wafer. The first mold half has an array of projections an…
Who is the assignee on this patent?
Schott Ag
What technology area does this patent fall under?
Primary CPC classification H10H20/819. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 10 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).