Display apparatus and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-12082450-B2
Application number	US-202217727590-A
Country	US
Kind code	B2
Filing date	Apr 22, 2022
Priority date	Sep 4, 2018
Publication date	Sep 3, 2024
Grant date	Sep 3, 2024

Abstract

A display apparatus includes a plurality of pixels. Each pixel of the pixels includes a thin film transistor, a first insulating pattern positioned on the thin film transistor, a pixel electrode positioned on the first insulating pattern, and a second insulating pattern covering an edge of the pixel electrode and contacting an edge of the first insulating pattern.

First claim

What is claimed is:

1. A display apparatus comprising:
a substrate;
a thin film transistor on the substrate and comprising a semiconductor layer and a gate electrode;
a first insulating layer on the substrate and covering the semiconductor layer and the gate electrode of the thin film transistor;
a second insulating layer on the first insulating layer and at least partially covering a top surface of an electrode connected to the semiconductor layer of the thin film transistor;
a third insulating layer on the second insulating layer, an opening defined in the third insulating layer extends to a top surface of the second insulating layer;
a pixel electrode positioned on the third insulating layer and electrically connected to the thin film transistor by contacting the electrode; and
a fourth insulating layer on the third insulating layer covering an edge of the pixel electrode and a side surface of the third insulating layer,
wherein the opening of the third insulating layer surrounds the entire edge of the pixel electrode in a plan view,
wherein the electrode connected to the semiconductor layer contacts a top surface of the first insulating layer,
wherein the fourth insulating layer covers the entire side surface of the third insulating layer and the top surface of the second insulating layer, in the opening of the third insulating layer, and
wherein the second insulating layer does not have a hole in the opening of the third insulating layer.

2. The display apparatus of claim 1 , wherein the pixel electrode contacts one of a source electrode and a drain electrode of the thin film transistor through a hole defined in the third insulating layer and a hole defined in the second insulating layer, and
wherein the electrode connected to the semiconductor layer is one of the source electrode and the drain electrode of the thin film transistor.

3. The display apparatus of claim 2 , wherein an opening defined in the fourth insulating layer overlapping the pixel electrode does not overlap the hole defined in the third insulating layer and the hole defined in the second insulating layer.

4. The display apparatus of claim 2 , wherein the opening of the third insulating layer is positioned around the pixel electrode.

5. The display apparatus of claim 1 , wherein the second insulating layer comprises an inorganic material.

6. The display apparatus of claim 1 , wherein the third insulating layer comprises an organic material.

7. The display apparatus of claim 1 , further comprising:
an emission layer on the pixel electrode; and
an opposite electrode on the emission layer.

8. The display apparatus of claim 7 , further comprising an encapsulation member on the opposite electrode and comprising at least one inorganic material layer and at least one organic material layer.

Assignees

• Samsung Display Co Ltd

Inventors

• Yang Yonghoon
• Ko Minsuk
• Kim Sikwang
• Kim Taegyun

Classifications

• H10K59/123

  Connection of the pixel electrodes to the thin film transistors [TFT] · CPC title

• H10K59/124 Primary

  Insulating layers formed between TFT elements and OLED elements · CPC title

• H10K59/1213 Primary

  the pixel elements being TFTs · CPC title

• H10K59/873

  Encapsulations · CPC title

• H10K59/8052

  Cathodes · CPC title