Wide bandgap semiconductor device with sensor element

Patent metadata

Field	Value
Publication number	US-12074079-B2
Application number	US-202117201468-A
Country	US
Kind code	B2
Filing date	Mar 15, 2021
Priority date	Apr 11, 2019
Publication date	Aug 27, 2024
Grant date	Aug 27, 2024

Abstract

Shielding techniques are used to provide an embedded sensor element such as a temperature sensing element on a wide bandgap power semiconductor device. A semiconductor device may include a drift layer and an embedded sensor element. The drift layer may be a wide bandgap semiconductor material. A shielding structure is provided in the drift layer below the embedded sensor element. The embedded sensor element may be provided between contacts that are in electrical contact with the shielding well. The distance between the contacts may be minimized. A noise reduction well may be provided between the contacts to further isolate the embedded sensor element from parasitic signals.

First claim

What is claimed is:

1. A semiconductor device comprising:
a drift layer comprising a wide bandgap semiconductor material;
an embedded sensor element;
an insulating layer between the drift layer and the embedded sensor element;
a shielding well between the drift layer and the embedded sensor element;
a first contact in electrical contact with the shielding well; and
a second contact in electrical contact with the shielding well, wherein the embedded sensor element is between the first contact and the second contact.

2. The semiconductor device of claim 1 wherein the embedded sensor element is a temperature sensing element.

3. The semiconductor device of claim 2 wherein the shielding well has a doping type that is opposite a doping type of the drift layer.

4. The semiconductor device of claim 3 wherein the shielding well is an implanted region in the drift layer.

5. The semiconductor device of claim 3 wherein:
the semiconductor device comprises an active area; and
the active area comprises one or more implanted regions configured to provide a vertical metal-oxide-semiconductor field-effect transistor (MOSFET).

6. The semiconductor device of claim 5 wherein the wide bandgap semiconductor material comprises silicon carbide.

7. The semiconductor device of claim 3 wherein:
the semiconductor device comprises an active area; and
the active area comprises one or more implanted regions configured to provide one of a bipolar junction transistor (BJT), an insulated gate bipolar transistor (IGBT), and a thyristor.

8. The semiconductor device of claim 2 further comprising:
a first contact well, wherein:
the first contact well is an implanted region in the shielding well;
the first contact well has a same doping type as the shielding well and a doping concentration that is greater than a doping concentration of the shielding well; and
the first contact is in electrical contact with the shielding well via the first contact well; and
a second contact well, wherein:
the second contact well is an implanted region in the shielding well;
the second contact well has a same doping type as the shielding well and a doping concentration that is greater than the doping concentration of the shielding well; and
the second contact is in electrical contact with the shielding well via the second contact well.

9. The semiconductor device of claim 8 further comprising:
an inter-metal dielectric layer;
a sensor contact pad on the inter-metal dielectric layer such that the sensor contact pad at least partially overlaps one of the first contact and the second contact, wherein the sensor contact pad is electrically isolated from the first contact and the second contact by a portion of the inter-metal dielectric layer; and
a via through the inter-metal dielectric such that the via electrically couples the sensor contact pad to the embedded sensor element.

10. The semiconductor device of claim 2 wherein the first contact and the second contact are electrically coupled to a fixed potential.

11. The semiconductor device of claim 2 wherein a distance between the first contact and the second contact is less than or equal to 200 μm.

12. The semiconductor device of claim 2 further comprising a noise reduction well, wherein:
the noise reduction well has a doping type that is opposite the doping type of the shielding well;
the noise reduction well is separated from the drift layer by at least a portion of the noise reduction well; and
the first contact and the second contact are in electrical contact with the noise reduction well.

13. The semiconductor device of claim 1 wherein the embedded sensor element is a diode.

14. A semiconductor device comprising:
a drift layer comprising a wide bandgap semiconductor material;
an embedded sensor element;
an insulating layer between the drift layer and the embedded sensor element;
a shielding well between the drift layer and the embedded sensor element; and
an additional functional layer and an additional insulating layer between the drift layer and the embedded sensor element,
wherein the insulating layer is on the drift layer, the additional functional layer is on the insulating layer, the additional insulating layer is on the additional functional layer, and the embedded sensor element is on the additional insulating layer.

15. The semiconductor device of claim 14 wherein the additional functional layer comprises polysilicon.

16. The semiconductor device of claim 14 wherein the additional functional layer comprises polysilicon that is one of at least partially metallized and at least partially silicided.

17. The semiconductor device of claim 14 further comprising a lumped resistor element on the additional insulating layer.

18. The semiconductor device of claim 17 wherein:
the semiconductor device comprises an active area; and
the active area comprises one or more implanted regions configured to provide a metal-oxide-semiconductor field-effect transistor (MOSFET); and
the lumped resistor element is coupled to a gate of the MOSFET.

19. The semiconductor device of claim 14 further comprising:
a noise reduction well;
a first contact in electrical contact with the shielding well; and
a second contact in electrical contact with the shielding well, wherein the embedded sensor element is between the first contact and the second contact,
wherein the noise reduction well has a doping type that is opposite the doping type of the shielding well,
wherein the noise reduction well is separated from the drift layer by at least a portion of the noise reduction well, and
wherein the first contact and the second contact are in electrical contact with the noise reduction well.

20. The semiconductor device of claim 14 wherein the embedded sensor element is a temperature sensing element.

21. A semiconductor device comprising:
a substrate;
a drift layer on the substrate;
an insulating layer on the drift layer;
a first functional layer on the insulating layer;
an additional insulating layer on the first functional layer; and
a lumped resistor element on the additional insulating layer.

22. The semiconductor device of claim 21 wherein the first functional layer comprises polysilicon.

23. The semiconductor device of claim 22 wherein the first functional layer comprises polysilicon that has been one of partially metallized and partially silicided.

24. The semiconductor device of claim 23 wherein the semiconductor device comprises an active area including one or more implanted regions in the drift layer, wherein the one or more implanted regions are configured to provide a metal-oxide-semiconductor field-effect transistor (MOSFET) and the lumped resistor element is coupled to a gate of the MOSFET.

25. The semiconductor device of claim 24 wherein the first functional layer provides a gate electrode of the MOSFET.

Assignees

• Wolfspeed Inc

Inventors

• Kim Joohyung
• Ryu Sei-Hyung
• Han Kijeong
• Harrington Iii Thomas E
• Van Brunt Edward Robert

Classifications

• H10W72/926

  Multiple bond pads having different sizes · CPC title

• H10W74/137

  the encapsulations being directly on the semiconductor body (H10W74/134 takes precedence) · CPC title

• H10W40/00 Primary

  Arrangements for thermal protection or thermal control (integrated devices comprising arrangements for thermal protection H10D89/60) · CPC title

• H10W20/484 Primary

  Interconnections having extended contours, e.g. pads having mesh shape or interconnections comprising connected parallel stripes · CPC title

• H10D62/127

  of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs · CPC title