Model-based scheduling for substrate processing systems

Patent metadata

Field	Value
Publication number	US-12072689-B2
Application number	US-202017442517-A
Country	US
Kind code	B2
Filing date	Mar 24, 2020
Priority date	Mar 29, 2019
Publication date	Aug 27, 2024
Grant date	Aug 27, 2024

Abstract

For etching tools, a neural network model is trained to predict optimum scheduling parameter values. The model is trained using data collected from preventive maintenance operations, recipe times, and wafer-less auto clean times as inputs. The model is used to capture underlying relationships between scheduling parameter values and various wafer processing scenarios to make predictions. Additionally, in tools used for multiple parallel material deposition processes, a nested neural network based model is trained using machine learning. The model is initially designed and trained offline using simulated data and then trained online using real tool data for predicting wafer routing path and scheduling. The model improves accuracy of scheduler pacing and achieves highest tool/fleet utilization, shortest wait times, and fastest throughput.

First claim

What is claimed is:

1. A system for processing semiconductor substrates in a tool comprising a plurality of processing chambers configured to process the semiconductor substrates according to a recipe, the system comprising:
a processor; and
non-transitory memory storing instructions for execution by the processor, wherein the instructions are configured to:
receive first data from the tool regarding processing of the semiconductor substrates in the plurality of processing chambers according to the recipe;
receive second data regarding a configuration of the tool and the recipe;
simulate, using the second data, a plurality of processing scenarios and scheduling parameters for the plurality of processing scenarios for processing the semiconductor substrates in the plurality of processing chambers according to the recipe;
simulate the processing of the semiconductor substrates in the plurality of processing chambers according to the recipe using the plurality of processing scenarios and the scheduling parameters for the plurality of processing scenarios;
train a model using the first data and data generated by the simulation to predict optimum scheduling parameters for processing the semiconductor substrates in the plurality of processing chambers according to the recipe;
receive inputs from the tool regarding processing of one of the semiconductor substrates in the plurality of processing chambers according to the recipe;
predict based on the inputs, using the model, optimum scheduling parameters for processing the one of the semiconductor substrates in the plurality of processing chambers according to the recipe; and
schedule operations of the tool based on the optimum scheduling parameters for processing the one of the semiconductor substrates in the plurality of processing chambers according to the recipe.

2. The system of claim 1 wherein the instructions are configured to execute the operations of the tool based on the optimum scheduling parameters for processing the one of the semiconductor substrates in the plurality of processing chambers according to the recipe.

3. The system of claim 1 wherein the optimum scheduling parameters minimize idle times for the one of the semiconductor substrates during processing in the plurality of processing chambers according to the recipe and wherein the optimum scheduling parameters maximize throughput of the tool.

4. The system of claim 1 wherein the instructions are configured to train the model using a machine learning method including an artificial neural network and support vector regression.

5. The system of claim 1 wherein the instructions are configured to:
analyze the first data received from the tool and the data generated by the simulation;
detect, based on the analysis, patterns regarding preventive maintenance operations, wafer-less auto clean times, wait times, recipe times, and throughput for the tool; and
train the model based on the detected patterns.

6. The system of claim 1 wherein the instructions are configured to train the model to predict the optimum scheduling parameters for one of the plurality of processing scenarios.

7. The system of claim 1 wherein the instructions are configured to (Original) train the model to predict the optimum scheduling parameters for all of the plurality of processing scenarios.

8. The system of claim 1 wherein the instructions are configured to train the model for performing only etching operations on the one of the semiconductor substrates.

9. The system of claim 1 wherein the instructions are configured to train the model for performing both etching and stripping operations on the one of the semiconductor substrates.

10. The system of claim 1 wherein the model is implemented remotely from the tool and wherein the instructions are configured to train the model based on data received from multiple tools.

11. The system of claim 1 wherein the instructions are configured to adjust the model for tool-to-tool variations in configurations and operations.

12. The system of claim 1 wherein the model is implemented in a cloud as software-as-a-Service (SaaS) and wherein the tool is configured to access the model via a network.

13. The system of claim 1 wherein:
the instructions are configured to train a second model based on data of a second tool;
the model and the second model are implemented remotely from the tool and the second tool; and
wherein the tool and the second tool are respectively configured to access the model and the second model via one or more networks.

14. The system of claim 13 wherein the instructions are configured to allow the tool and the second tool to respectively select the model and the second model based on configurations of the tool and the second tool.

15. The system of claim 1 wherein the model is implemented on the tool and wherein the instructions are configured to predict, using the model, the optimum scheduling parameters for processing the one of the semiconductor substrates in the plurality of processing chambers according to the recipe using data generated by the tool.

16. The system of claim 1 wherein the model is implemented on the tool and wherein the instructions are configured to adjust the model for any drift in performance of the tool.

17. The system of claim 1 wherein the first data received from the tool includes data from preventive maintenance operations performed on the tool and data regarding recipe times and wafer-less auto clean times for the tool.

18. The system of claim 1 wherein the data generated by the simulation includes data generated based on the configuration of the tool, wafer-flow types, run scenarios, recipe times, and wafer-less auto clean times obtained from the tool.

19. The system of claim 1 wherein the inputs received from the tool include data regarding a number of preventive maintenance operations, recipe times, and wafer-less auto clean times for the tool.

20. The system of claim 1 wherein the instructions are configured to predict the optimum scheduling parameters by factoring in one or more skipped preventive maintenance operations.

21. The system of claim 1 wherein the instructions are configured to:
schedule, using the model, a plurality of operations for processing the one of the semiconductor substrates in the plurality of processing chambers according to the recipe, wherein the tool progresses through a plurality of states in response to performing the plurality of operations, respectively, and wherein a state of the tool includes indications of resources of the tool and a processing status of the one of the semiconductor substrate;
for each of the plurality of states, send to the model a current state of the plurality of states and multiple schedulable operations to progress to a next state of the plurality of states, receive from the model a best operation from the multiple schedulable operations selected by the model based on the current state to progress to the next state, and simulate execution of the best operation to simulate progression to the next state; and
train the model to recommend the best operations as the plurality of operations in response to the tool progressing through the plurality of states when processing the semiconductor substrates in the plurality of processing chambers according to the recipe.

22. A system for processing semiconductor substrates in a tool comprising a plurality of processing chambers configured to process the semiconductor substrates ac

Assignees

• Lam Res Corp

Inventors

• Chau Raymond
• Huang Chung-Ho
• Chan Henry
• Wong Vincent
• Ding Yu
• Nguyen Ngoc-Diep
• Manuguid Gerramine

Classifications

• H10P72/0612 Primary

  Production flow monitoring, e.g. for increasing throughput · CPC title

• G06N3/045

  Combinations of networks · CPC title

• G06N3/09

  Supervised learning · CPC title

• G06N3/0499

  Feedforward networks · CPC title

• G06N3/082

  modifying the architecture, e.g. adding, deleting or silencing nodes or connections · CPC title