Semiconductor device

Patent metadata

Field	Value
Publication number	US-12068310-B2
Application number	US-202017124817-A
Country	US
Kind code	B2
Filing date	Dec 17, 2020
Priority date	Mar 26, 2020
Publication date	Aug 20, 2024
Grant date	Aug 20, 2024

Abstract

The semiconductor device according to the present application includes: a hole injection region including a hole injection layer and a semiconductor layer of a second conductivity type; a diode region including an anode layer of a second conductivity type and a cathode layer of a first conductivity type; a boundary portion semiconductor layer of a second conductivity type provided between the diode region and the hole injection region and provided on a first main surface side; a carrier injection suppression layer of a first conductivity type provided in a surface layer of the boundary portion semiconductor layer; and a semiconductor layer of a second conductivity type provided to protrude from the hole injection region on a second main surface side.

First claim

What is claimed is:

1. A semiconductor device comprising:
a semiconductor substrate including a drift layer of a first conductivity type between a first main surface and a second main surface facing the first main surface;
a hole injection region including:
a hole injection layer of a second conductivity type provided in a surface layer on the first main surface side of the semiconductor substrate, and
a semiconductor layer of the second conductivity type provided in a surface layer on the second main surface side;

a diode region including:
an anode layer of the second conductivity type provided in the surface layer on the first main surface side of the semiconductor substrate,
an anode contact layer of the second conductivity type selectively provided in the surface layer on the first main surface side of the anode layer, the anode contact layer having a higher impurity concentration than the anode layer, and
a cathode layer of the first conductivity type provided in the surface layer on the second main surface side of the semiconductor substrate,
the diode region having no semiconductor layer of the first conductivity type between the second main surface side of the anode layer and the first main surface, and
the hole injection region and the diode region being not directly arranged adjacent to each other;

a boundary region including:
a boundary portion semiconductor layer of the second conductivity type provided between the diode region and the hole injection region, the boundary portion semiconductor layer provided in the surface layer on the first main surface side of the semiconductor substrate,
a carrier injection suppression layer of the first conductivity type provided in a surface layer of the boundary portion semiconductor layer and extending to the first main surface,
a boundary portion contact layer of the second conductivity type provided in the surface layer of the boundary portion semiconductor layer, the boundary portion contact layer having a higher impurity concentration than the boundary portion semiconductor layer,
an electrode on and connected to the carrier injection suppression layer and the boundary portion contact layer, and
the semiconductor layer of the second conductivity type provided in the surface layer on the second main surface side is provided to protrude from the hole injection region in the surface layer on the second main surface side of the semiconductor substrate; and

a boundary dummy gate electrode provided on the first main surface side of the semiconductor substrate between the diode region and the boundary region, the boundary dummy gate electrode facing the boundary portion semiconductor layer and the drift layer via a gate insulating film, the boundary dummy gate electrode to which no gate driving voltage is applied.

2. The semiconductor device according to claim 1 , wherein
the hole injection region includes the hole injection layer of the second conductivity type as a base layer of the second conductivity type, and the semiconductor layer of the second conductivity type as a collector layer of the second conductivity type, and
the hole injection region is an insulated gate bipolar transistor region including:
an emitter layer of the first conductivity type selectively provided in a surface layer on the first main surface side of the base layer, and
a gate electrode provided on the first main surface side of the semiconductor substrate, a plurality of the gate electrodes arranged side by side in a direction along the first main surface, the gate electrode facing the emitter layer, the base layer, and the drift layer via the gate insulating film.

3. The semiconductor device according to claim 2 , wherein
the gate electrode includes a plurality of gate electrodes, and
a width of the boundary region is larger than a distance between the gate electrodes adjacent to each other in the insulated gate bipolar transistor region.

4. The semiconductor device according to claim 2 , wherein an impurity concentration distribution of the first conductivity type in a depth direction from the first main surface toward the second main surface is a same in the emitter layer and the carrier injection suppression layer.

5. The semiconductor device according to claim 2 , wherein an impurity concentration of the second conductivity type of the boundary portion semiconductor layer is lower than an impurity concentration of the second conductivity type of the base layer.

6. The semiconductor device according to claim 2 , wherein an impurity concentration of the second conductivity type of the anode layer is lower than an impurity concentration of the second conductivity type of the base layer.

7. The semiconductor device according to claim 1 , wherein
in the boundary region, one or more first dummy gate electrodes are arranged side by side in a direction along the first main surface on the first main surface side of the semiconductor substrate and each of the one or more first dummy gate electrodes is not applied with the gate driving voltage,
in the diode region, a plurality of second dummy gate electrodes are provided on the first main surface side of the semiconductor substrate and arranged side by side in the direction along the first main surface,
each of the plurality of second dummy gate electrodes faces the anode layer and the drift layer via the gate insulating film, and is not applied with the gate driving voltage.

Assignees

• Mitsubishi Electric Corp

Inventors

• Ikeda Munenori
• Soneda Shinya
• Harada Kenji

Classifications

• H10W10/051

  of isolation region based on field-effect · CPC title

• H10W10/50

  Isolation regions based on field-effect · CPC title

• H10W10/30

  Isolation regions comprising PN junctions · CPC title

• H10W10/031

  of isolation regions comprising PN junctions · CPC title

• H10D84/161

  IGBT having built-in components · CPC title