Optical measuring device having photonic chip with interferometer and phase adjuster set for minimizing signal from interference region
US-10345233-B2 · Jul 9, 2019 · US
Apparatus for optical coherence tomography within integrated optoelectronic circuit
US12064210B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12064210-B2 |
| Application number | US-201916967604-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 25, 2019 |
| Priority date | Feb 26, 2018 |
| Publication date | Aug 20, 2024 |
| Grant date | Aug 20, 2024 |
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- Title
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Abstract
Official abstract text for this publication.
Examples of the disclosure relate to an apparatus, an optical coherence tomography device, a wearable electronic device and method of forming an apparatus for optical coherence tomography. The apparatus comprises at least one layer of silicon dioxide and an integrated optoelectronic circuit. The integrated optoelectronic circuit comprises at least an interferometer configured for optical coherence tomography wherein the integrated optoelectronic circuit is formed within the at least one layer of silicon dioxide.
First claim
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The invention claimed is: 1. An apparatus comprising: at least one layer of silicon dioxide; and an integrated optoelectronic circuit comprising at least an interferometer configured for optical coherence tomography wherein the integrated optoelectronic circuit is formed within defining surfaces of the at least one layer of silicon dioxide such that at least a portion of the integrated optoelectronic circuit is formed from the at least one layer of silicon dioxide. 2. An apparatus as claimed in claim 1 wherein the interferometer comprises an input light guide, a beam splitter, a sample line light guide, a delay line light guide and an output light guide. 3. An apparatus as claimed in claim 2 wherein the interferometer comprises at least one mirror configured to reflect light back into the delay line. 4. An apparatus as claimed in claim 1 wherein the integrated optoelectronic circuit comprises at least one optical circulator. 5. An apparatus as claimed in claim 1 wherein the integrated optoelectronic circuit comprises a detector configured to detect light from the interferometer. 6. An apparatus as claimed in claim 5 wherein the detector comprises at least one diode. 7. An apparatus as claimed in claim 5 wherein the detector comprises a balanced diode pair. 8. An apparatus as claimed in claim 1 wherein the at least one layer of silicon dioxide is provided on a substrate. 9. An apparatus as claimed in claim 1 wherein the integrated optoelectronic circuit has a largest dimension of less than 10 mm. 10. An apparatus as claimed in claim 1 , wherein the integrated optoelectronic circuit comprises a detector configured to detect light from the interferometer; the at least one layer of silicon dioxide is provided on a substrate; and the apparatus comprises a light source located on the substrate. 11. An apparatus as claimed in claim 1 wherein the apparatus further comprises a coherent light source. 12. An apparatus as claimed in claim 11 wherein the light source comprises a laser. 13. A method comprising: providing at least one layer of silicon dioxide; and forming an integrated optoelectronic circuit comprising at least an interferometer configured for optical coherence tomography within defining surfaces of the at least one layer of silicon dioxide such that at least a portion of the integrated optoelectronic circuit is formed from the at least one layer of silicon dioxide. 14. A wearable electronic device comprising: optical coherence tomography device comprising a light source; at least one layer of silicon dioxide; and an integrated optoelectronic circuit comprising at least an interferometer configured for optical coherence tomography wherein the integrated optoelectronic circuit is formed within defining surfaces of the at least one layer of silicon dioxide such that at least a portion of the integrated optoelectronic circuit is formed from the at least one layer of silicon dioxide; and attachment configured to attach the optical coherence tomography device to a subject. 15. A wearable electronic device as claimed in claim 14 wherein the attachment configured to attach the optical coherence tomography device to a subject comprises a strap. 16. A wearable electronic device as claimed in claim 4 wherein the interferometer comprises an input light guide, a beam splitter, a sample line light guide, a delay line light guide and an output light guide. 17. A wearable electronic device as claimed in claim 16 wherein the interferometer comprises at least one mirror configured to reflect light back into the delay line. 18. A wearable electronic device as claimed in claim 14 wherein the integrated optoelectronic circuit comprises at least one optical circulator. 19. A wearable electronic device as claimed in claim 14 wherein the integrated optoelectronic circuit comprises a detector configured to detect light from the interferometer. 20. A wearable electronic device as claimed in claim 19 wherein the detector comprises at least one diode.
Assignees
Inventors
Classifications
Low-coherence interferometers · CPC title
Tomographic interferometers, e.g. based on optical coherence · CPC title
- G01B9/02051Primary
Integrated design, e.g. on-chip or monolithic · CPC title
Manufacturing methods specially adapted for producing sensors for in-vivo measurements · CPC title
Optical sensor arrangements for performing transmission measurements on body tissue · CPC title
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Frequently asked questions
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- What does patent US12064210B2 cover?
- Examples of the disclosure relate to an apparatus, an optical coherence tomography device, a wearable electronic device and method of forming an apparatus for optical coherence tomography. The apparatus comprises at least one layer of silicon dioxide and an integrated optoelectronic circuit. The integrated optoelectronic circuit comprises at least an interferometer configured for optical cohere…
- Who is the assignee on this patent?
- Nokia Technologies Oy
- What technology area does this patent fall under?
- Primary CPC classification G01B9/02051. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Aug 20 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).