Circuit board

Patent metadata

Field	Value
Publication number	US-12063737-B2
Application number	US-202117921778-A
Country	US
Kind code	B2
Filing date	Apr 26, 2021
Priority date	Apr 27, 2020
Publication date	Aug 13, 2024
Grant date	Aug 13, 2024

Abstract

A circuit board according to an embodiment includes an insulating layer; and a lead pattern portion disposed on the insulating layer, wherein the lead pattern portion includes: a first portion disposed on the insulating layer; and a second portion extending from one end of the first portion; wherein the first portion is disposed overlapping the insulating layer in a vertical direction, wherein the second portion is disposed in an outer region of the insulating layer and does not overlap the insulating layer; and wherein the lead pattern portion has a centerline average roughness in a range of 0.05 μm to 0.5 μm or a 10-point average roughness in a range of 1.0 μm to 5.0 μm.

First claim

The invention claimed is:

1. A circuit board comprising:
an insulating layer; and
a lead pattern portion disposed on the insulating layer and having a centerline average roughness in a range of 0.05 μm to 0.5 μm or a 10-point average roughness in a range of 1.0 μm to 5.0 μm,
wherein the lead pattern portion includes:
a first portion disposed on the insulating layer; and
a second portion extending from one end of the first portion;

wherein the first portion is disposed overlapping the insulating layer in a vertical direction, and
wherein the second portion is disposed in an outer region of the insulating layer and does not overlap the insulating layer in a vertical direction.

2. The circuit board of claim 1 , wherein the lead pattern portion has a tensile strength of at least 1000 N/mm 2 or a 0.2% offset yield strength of at least 1000 N/mm 2 .

3. The circuit board of claim 1 , wherein the lead pattern portion includes a lower surface in contact with the insulating layer, and an upper surface opposite to the lower surface, and
wherein the center line average roughness or the 10-point average roughness is a surface roughness of the upper surface or the lower surface of the lead pattern portion.

4. The circuit board of claim 1 , wherein the lower surface of the lead pattern portion has a centerline average roughness in a range of 0.05 μm to 0.5 μm or a 10-point average roughness in a range of 1.0 μm to 5.0 μm, and
wherein the upper surface of the lead pattern portion has a centerline average roughness in a range of 0.05 μm to 0.5 μm or a 10-point average roughness in a range of 1.0 μm to 5.0 μm.

5. The circuit board of claim 4 , wherein the lead pattern portion includes a metal layer disposed on the insulating layer,
wherein the upper surface of the lead pattern portion is an upper surface of the metal layer, and
wherein the lower surface of the lead pattern portion is a lower surface of the metal layer.

6. The circuit board of claim 4 , wherein the lead pattern portion includes:
a first plating layer disposed on the insulating layer; and
a metal layer disposed on the first plating layer,
wherein the upper surface of the lead pattern portion is an upper surface of the metal layer, and
wherein the lower surface of the lead pattern portion is a lower surface of the first plating layer.

7. The circuit board of claim 4 , wherein the lead pattern portion includes:
a first plating layer disposed on the insulating layer;
a metal layer disposed on the first plating layer; and
a second plating layer disposed on the metal layer,
wherein the upper surface of the lead pattern portion is an upper surface of the second plating layer, and
wherein a lower surface of the lead pattern portion is a lower surface of the first plating layer.

8. The circuit board of claim 4 , wherein each of the upper and lower surfaces of the lead pattern portion has a centerline average roughness in a range of 0.08 μm to 0.15 μm or a 10-point average roughness in a range of 1.0 to 2.5 μm.

9. The circuit board of claim 1 , wherein each of the first and second portions of the lead pattern portion has a width of an upper surface in a range of 50% to 100% of a width of a lower surface.

10. The circuit board of claim 1 , wherein the lead pattern portion includes:
a third portion connected to the first portion through the second portion and including a through hole, and
wherein the third portion of the lead pattern portion does not overlap the insulating layer in a vertical direction.

11. The circuit board of claim 10 , wherein the second portion of the lead pattern portion is provided between the first portion and the third portion of the lead pattern portion and includes a plurality of bent regions bent in different directions.

12. The circuit board of claim 10 , wherein the insulating layer includes an opening penetrating an upper surface of the insulating layer and a lower surface of the insulating layer, and
wherein the lead pattern portion further includes a fourth portion extending in an inner direction of the insulating layer from the other end of the first portion of the lead pattern portion and overlapping the opening of the insulating layer in a vertical direction.

13. The circuit board of claim 1 , wherein the lead pattern portion includes a binary alloy a ternary composite alloy in which copper (Cu) contains at least one of nickel (Ni), tin (Sn), manganese (Mn), aluminum (Al), beryllium (Be), and cobalt (Co).

14. The circuit board of claim 1 , further comprising:
a reinforcing pattern disposed on the insulating layer and spaced apart from the lead pattern portion,
wherein the reinforcing pattern portion includes the same metal material as the metal material of the lead pattern portion.

15. The circuit board of claim 14 , wherein the reinforcing pattern portion has a centerline average roughness in a range of 0.05 μm to 0.5 μm or a 10-point average roughness in a range of 1.0 μm to 5.0 μm.

16. A sensor driving device comprising:
a fixed portion including a magnet holder, a magnet portion coupled to the magnet holder, and a first lead pattern portion disposed on the magnet holder;
a moving portion spaced apart from the fixed unit at a predetermined interval and including an image sensor; and
a plurality of wires disposed between the moving portion and the fixed portion,
wherein the moving portion includes a circuit board including an insulating layer and a second lead pattern portion disposed on the insulating layer,
wherein one end of the second lead pattern portion is electrically connected to the wire, and the other end of the lead pattern portion is electrically connected to the image sensor, and
wherein at least one surface of the second lead pattern portion has a centerline average roughness in a range of 0.05 μm to 0.5 μm or a 10-point average roughness in a range of 1.0 μm to 5.0 μm.

17. The sensor driving device of claim 16 , wherein the insulating layer includes an opening in which the image sensor is disposed, and
wherein the second lead pattern portion includes:
a first portion disposed on the insulating layer;
a second portion extending outwardly from one end of the first portion;
a third portion connected to the first portion through the second portion and including a through hole through which the wire passes; and
a fourth portion extending inwardly from the other end of the first portion, positioned on the opening, and electrically connected to the image sensor.

18. The sensor driving device of claim 16 , wherein the second lead pattern portion includes a binary alloy a ternary composite alloy in which copper (Cu) contains at least one of nickel (Ni), tin (Sn), manganese (Mn), aluminum (Al), beryllium (Be), and cobalt (Co).

19. A camera module comprising:
a first camera actuator for driving a lens module; and
a second camera actuator for driving an image sensor;
wherein the first camera actuator moves the lens module to perform an auto focusing or zoom operation,
wherein the second camera actuator moves the image sensor to perform an OIS (Optical Image Stabilizer) operation,
wherein the second camera actuator includes:
a fixed portion including a magnet holder, a magnet portion coupled to the magnet holder, and a first lead pattern portion disposed on the magnet holder;
a moving portion spaced apart from the fixed unit at a predetermined interval and including an image sensor; and
a plurality of wires disposed between the moving portion and the fixed portion,

wherein the moving port

Assignees

• Lg Innotek Co Ltd

Inventors

• Kim Hae Sik
• Paik Jee Heum

Classifications

• H05K2201/10287

  Metal wires as connectors or conductors · CPC title

• H05K2201/10151

  Sensor · CPC title

• H05K2201/09618

  Via fence, i.e. one-dimensional array of vias · CPC title

• H05K2201/0939

  Curved pads, e.g. semi-circular or elliptical pads or lands · CPC title

• H05K1/116

  Lands, clearance holes or other lay-out details concerning the surrounding of a via · CPC title