Wiring substrate and semiconductor device

Patent metadata

Field	Value
Publication number	US-12057384-B2
Application number	US-202117526089-A
Country	US
Kind code	B2
Filing date	Nov 15, 2021
Priority date	Nov 16, 2020
Publication date	Aug 6, 2024
Grant date	Aug 6, 2024

Abstract

A wiring substrate includes a bendable portion including one or more wiring layers and insulation layers that are alternately stacked. The insulation layers of the bendable portion include a first insulation layer and a second insulation layer. The first insulation layer is located at an inner bent position of the bendable portion when the bendable portion is bent. The second insulation layer is located at an outer bent position of the bendable portion relative to the first insulation layer when the bendable portion is bent. The first insulation layer has a higher elastic modulus than the second insulation layer.

First claim

What is claimed is:

1. A wiring substrate, comprising:
a bendable portion including one or more wiring layers and insulation layers, the one or more wiring layers being alternately stacked with the insulation layers, wherein the insulation layers of the bendable portion include:
a first insulation layer that is located at an inner bent position of the bendable portion when the bendable portion is bent;
a second insulation layer that is located at an outer bent position of the bendable portion relative to the first insulation layer when the bendable portion is bent; and
a third insulation layer disposed between the first insulation layer and the second insulation layer in a stacking direction of the wiring substrate,

the first insulation layer has an elastic modulus that is higher than that of the second insulation layer,
the third insulation layer has an elastic modulus that is lower than the elastic modulus of the first insulation layer,
wherein the one or more wiring layers of the bendable portion include:
a first wiring layer covered by the first insulation layer;
a second wiring layer stacked on the first insulation layer and electrically connected to the first wiring layer, the second wiring layer being covered by the third insulation layer stacked on the first insulation layer;
a third wiring layer stacked on the third insulation layer and electrically connected to the second wiring layer, the third wiring layer being covered by the second insulation layer stacked on the third insulation layer; and
a fourth wiring layer stacked on the second insulation layer and electrically connected to the third wiring layer,

the third wiring layer of the bendable portion is greater in area than the first wiring layer of the bendable portion and greater in area than the fourth wiring layer of the bendable portion.

2. The wiring substrate according to claim 1 , wherein the first insulation layer is located at an innermost bent position of the bendable portion among the insulation layers, and the second insulation layer is located at an outermost bent position of the bendable portion among the insulation layers.

3. The wiring substrate according to claim 1 , further comprising:
a mount portion for an electronic component, the mount portion being disposed adjacent to the bendable portion and including the one or more wiring layers and the insulation layers,
wherein the mount portion includes a via wiring connected to the one or more wiring layers, and the bendable portion is free of the via wiring.

4. The wiring substrate according to claim 1 , wherein the elastic modulus of the third insulation layer is higher than the elastic modulus of the second insulation layer.

5. The wiring substrate according to claim 1 , wherein the second wiring layer of the bendable portion is greater in area than the first wiring layer of the bendable portion and greater in area than the fourth wiring layer of the bendable portion.

6. The wiring substrate according to claim 1 , further comprising:
a protective insulation layer stacked on the second insulation layer and covering the fourth wiring layer,
wherein the protective insulation layer has an elastic modulus that is lower than the elastic modulus of the first insulation layer.

7. The wiring substrate according to claim 2 , further comprising:
a protective insulation layer stacked on the second insulation layer, wherein the protective insulation layer has an elastic modulus that is lower than the elastic modulus of the first insulation layer.

8. A semiconductor device, comprising:
the wiring substrate according to claim 1 ; and
an electronic component mounted on the wiring substrate.

Assignees

• Shinko Electric Ind Co

Inventors

• Taneda Hiroshi
• Imafuji Kei
• Akiyama Yoshiki
• Uchida Kensuke

Classifications

• H10W90/401

  characterised by multiple insulating or insulated package substrates, interposers or RDLs · CPC title

• H10W70/685

  comprising multiple insulating layers · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W70/611

  for connecting multiple chips together · CPC title

• H10W70/688 Primary

  Flexible insulating substrates · CPC title