Pixel circuit with a compensation module

Patent metadata

Field	Value
Publication number	US-12057072-B2
Application number	US-202318240684-A
Country	US
Kind code	B2
Filing date	Aug 31, 2023
Priority date	Sep 18, 2021
Publication date	Aug 6, 2024
Grant date	Aug 6, 2024

Abstract

A pixel circuit, a driving method therefor, and a display panel. The pixel circuit includes a drive module, a data write module, a compensation module, a current leakage suppression module, and a first storage module. A first terminal of the compensation module is electrically connected to a second terminal of the drive module. The control terminal of the compensation module accesses a first light emission control signal. A first terminal of the current leakage suppression module is electrically connected to the control terminal of the drive module. A second terminal of the current leakage suppression module is electrically connected to a second terminal of the compensation module. The control terminal of the current leakage suppression module accesses the first light emission control signal. A first terminal of the first storage module is electrically connected to the second terminal of the compensation module.

First claim

What is claimed is:

1. A pixel circuit, comprising:
a drive module comprising a control terminal, a first terminal, and a second terminal;
a data write module comprising a scan control terminal, a first terminal, and a second terminal, wherein the first terminal of the data write module is electrically connected to the first terminal of the drive module, the second terminal of the data write module accesses a data signal, and the scan control terminal of the data write module accesses a first scan signal;
a compensation module comprising a control terminal, a first terminal, and a second terminal, wherein the first terminal of the compensation module is electrically connected to the second terminal of the drive module, and the control terminal of the compensation module accesses a first light emission control signal;
a current leakage suppression module comprising a control terminal, a first terminal, and a second terminal, wherein the first terminal of the current leakage suppression module is electrically connected to the control terminal of the drive module, the second terminal of the current leakage suppression module is electrically connected to the second terminal of the compensation module, the control terminal of the current leakage suppression module accesses the first light emission control signal, and the current leakage suppression module and the compensation module are turned on in an initialization stage and a data write stage; and
a first storage module comprising a first terminal and a second terminal, wherein the first terminal of the first storage module is electrically connected to the second terminal of the compensation module, the second terminal of the first storage module accesses a reference voltage signal, and the first storage module is configured to maintain a voltage difference formed between the first terminal of the first storage module and the second terminal of the first storage module unchanged in the data write stage and a light emission stage.

2. The pixel circuit according to claim 1 , wherein the compensation module comprises:
a first transistor, wherein a first pole of the first transistor is electrically connected to the second terminal of the drive module, a second pole of the first transistor is electrically connected to the second terminal of the current leakage suppression module, and a gate of the first transistor accesses the first light emission control signal.

3. The pixel circuit according to claim 1 , wherein the current leakage suppression module comprises:
a second transistor, wherein a first pole of the second transistor is electrically connected to the control terminal of the drive module, a second pole of the second transistor is electrically connected to the second terminal of the compensation module, and a gate of the second transistor accesses the first light emission control signal.

4. The pixel circuit according to claim 1 , wherein the first storage module comprises:
a first capacitor, wherein a first pole of the first capacitor is electrically connected to the second terminal of the compensation module, and a second pole of the first capacitor accesses the reference voltage signal.

5. The pixel circuit according to claim 1 , wherein the data write module comprises:
a third transistor, wherein a first pole of the third transistor is electrically connected to the first terminal of the drive module, a second pole of the third transistor accesses the data signal, and a gate of the third transistor accesses the first scan signal.

6. The pixel circuit according to claim 1 , wherein the data write module further comprises a synchronization control terminal, the synchronization control terminal accesses the first light emission control signal, and the data write module transmits the data signal under common control of the first scan signal and the first light emission control signal.

7. The pixel circuit according to claim 6 , wherein the data write module comprises:
a third transistor, wherein a second pole of the third transistor accesses the data signal, and a gate of the third transistor accesses the first scan signal; and
a fourth transistor, wherein a first pole of the fourth transistor is electrically connected to the first terminal of the drive module, a second pole of the fourth transistor is electrically connected to a first pole of the third transistor, and a gate of the fourth transistor accesses the first light emission control signal.

8. The pixel circuit according to claim 1 , further comprising:
a second storage module comprising a first terminal and a second terminal, wherein the first terminal of the second storage module is electrically connected to the control terminal of the drive module, the second terminal of the second storage module accesses a first power signal, and the second storage module is configured to maintain a potential of the control terminal of the drive module unchanged in the light emission stage.

9. The pixel circuit according to claim 8 , wherein the second storage module comprises a second capacitor, a first pole of the second capacitor is electrically connected to the control terminal of the drive module, and a second pole of the second capacitor accesses the first power signal.

10. The pixel circuit according to claim 1 , further comprising:
a first light emission control module comprising a control terminal, a first terminal, and a second terminal, wherein the first terminal of the first light emission control module is electrically connected to the first terminal of the drive module, the second terminal of the first light emission control module accesses a first power signal, and the control terminal of the first light emission control module accesses a second light emission control signal;
a second light emission control module comprising a control terminal, a first terminal, and a second terminal, wherein the first terminal of the second light emission control module is electrically connected to the second terminal of the drive module, the second terminal of the second light emission control module is electrically connected to a light emission device, and the control terminal of the second light emission control module accesses the second light emission control signal; and
an initialization module comprising a control terminal, a first terminal, and a second terminal, wherein the first terminal of the initialization module is electrically connected to the second terminal of the second light emission control module, the second terminal of the initialization module accesses an initialization signal, and the control terminal of the initialization module accesses a second scan signal; and the first light emission control module, the second light emission control module, and the initialization module are simultaneously turned on in the initialization stage.

11. The pixel circuit according to claim 10 , wherein the first light emission control module comprises a fifth transistor, a first pole of the fifth transistor is electrically connected to the first terminal of the drive module, a second pole of the fifth transistor accesses the first power signal, and a gate of the fifth transistor accesses the second light emission control signal.

12. The pixel circuit according to claim 10 , wherein the second light emission control module comprises a sixth transistor, a first pole of the sixth transistor is electrically connected to the second terminal of the drive module, a second pole of the sixth transistor is electrically connected to the light emission device, and a gate of the sixth transistor accesses the second light emission control signal.

13. The pixel ci

Assignees

• Yungu Guan Tech Co Ltd

Inventors

• Guo Enqing
• Pan Kangguan
• Gai Cuili
• Chen Fa-Hsyang
• Xing Rubo
• Wang Gang
• Li Junfeng

Classifications

• G09G2320/0247

  Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes · CPC title

• G09G2300/0852

  being a dynamic memory with more than one capacitor · CPC title

• G09G3/32 Primary

  semiconductive, e.g. using light-emitting diodes [LED] · CPC title

• G09G2330/021

  Power management, e.g. power saving · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title