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US12056499B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12056499-B2
Application numberUS-202117218611-A
CountryUS
Kind codeB2
Filing dateMar 31, 2021
Priority dateMar 31, 2020
Publication dateAug 6, 2024
Grant dateAug 6, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A computer system has a plurality of operating systems, each operating system including a GPU driver; a graphics processing unit (GPU) including GPU firmware for controlling the execution of tasks at the graphics processing unit and, for each operating system: a firmware state register modifiable by the GPU firmware and indicating whether the GPU firmware is online; and an OS state register modifiable by the GPU driver of the respective operating system and indicating whether the GPU driver is online; and a memory management unit configured to mediate access to the registers of the GPU such that each operating system can access its respective registers but not those of other operating systems; wherein: one of the GPU drivers at the plurality of operating systems is a host GPU driver configured to initialise the GPU and bring the GPU firmware online; each GPU driver is configured to submit tasks for processing at the GPU only if its respective firmware state register indicates that the GPU firmware is online; and the GPU is configured to process tasks for an operating system if the respective OS state register of that operating system indicates that the GPU driver is online.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer system comprising: a plurality of operating systems, each operating system including a GPU driver; a graphics processing unit (GPU) including GPU firmware for controlling the execution of tasks at the graphics processing unit and, for each operating system: a firmware state register modifiable by the GPU firmware and indicating whether the GPU firmware is online; and an OS state register modifiable by the GPU driver of the respective operating system and indicating whether the GPU driver is online; and a memory management unit configured to mediate access to the registers of the GPU such that each operating system can access its respective registers but not those of other operating systems; wherein: one of the GPU drivers at the plurality of operating systems is a host GPU driver configured to initialise the GPU and bring the GPU firmware online; each GPU driver is configured to submit tasks for processing at the GPU only if its respective firmware state register indicates that the GPU firmware is online; and the GPU is configured to process tasks for an operating system if the respective OS state register of that operating system indicates that the GPU driver is online. 2. The computer system of claim 1 , wherein, responsive to its initialisation, the GPU firmware is configured to modify the firmware state registers to indicate to the operating system that the GPU firmware is online. 3. The computer system of claim 1 , wherein each GPU driver is configured to, on loading at its operating system, modify its respective OS state register at the GPU to indicate that the GPU driver is online. 4. The computer system of claim 1 , wherein, on loading at its operating system, the host GPU driver is configured to initialise the GPU firmware if its respective firmware state register indicates that the GPU firmware is not online. 5. The computer system of claim 1 , wherein, on loading at its operating system, the host GPU driver is configured not to initialise the GPU firmware if its respective firmware state register indicates that the GPU firmware is online. 6. The computer system of claim 1 , wherein each GPU driver has write access to its respective OS state register and the GPU firmware has read but not write access to the OS state registers. 7. The computer system of claim 1 , wherein the GPU firmware has write access to the firmware state registers and the GPU drivers have read but not write access to the firmware state registers. 8. The computer system of claim 1 , wherein all of the GPU drivers of the plurality of operating systems are identical drivers, each operable in a host mode as the host GPU driver or a non-host mode in which the GPU driver is not configured to initialise the GPU. 9. The computer system of claim 1 , wherein the GPU further comprises a kick register and a work queue for each of the plurality of operating systems, and each GPU driver is configured to write to its respective kick register when the GPU driver submits one or more tasks to its work queue. 10. The computer system of claim 1 , the GPU having access to a timer and further comprising a watchdog process and, for each operating system, a firmware timer register and a OS return register, wherein: the watchdog process is configured to, for each operating system, periodically write the timer value into the firmware timer register; the GPU driver is configured to periodically copy the timer value in the firmware timer register into the OS return register; and the watchdog process is configured to, for each operating system, compare the OS return register to the firmware timer register so as to determine whether that operating system is online. 11. The computer system of claim 10 , wherein, if the watchdog process determines that the operating system is not online, the GPU firmware ignores any tasks scheduled for processing at the GPU for that operating system. 12. The computer system of claim 10 , wherein the watchdog process is configured to perform its writing and comparing steps in respect of an operating system only while that operating system has tasks in a queue for processing at the GPU. 13. The computer system of claim 1 , wherein the memory management unit is configured to additionally provide the host GPU driver with access to a set of configuration registers of the GPU and the host GPU driver is configured to initialise the GPU by writing to the configuration registers. 14. The computer system of claim 1 , wherein the computer system does not include a software communication channel between the plurality of operating system instances or a software communication channel between the operating systems and the GPU. 15. The computer system of claim 1 , further comprising a central processing unit (CPU) arranged to support the plurality of operating systems. 16. The computer system of claim 1 , wherein the computer system does not include a hypervisor or virtual machine manager for the plurality of operating systems. 17. The computer system of claim 1 , wherein the number of operating systems in the plurality of operating systems is limited to the number of available pairs of firmware host registers and OS state registers at the GPU. 18. A method of booting a computer system which includes a central processing unit (CPU) for supporting a plurality of operating systems each including a GPU driver and a graphics processing unit (GPU) comprising GPU firmware for controlling the execution of tasks at the graphics processing unit and, for each operating system, a firmware state register modifiable by the GPU firmware and an OS state register modifiable by the GPU driver of the respective operating system, the method comprising: causing the plurality of operating systems to load at the CPU; configuring one or more memory management units of the computer system so as to allow each operating system to access its respective firmware and OS state registers at the GPU but not those of other operating systems; responsive to loading at its respective operating system, each GPU driver updating its respective OS state register at the GPU so as to indicate that the GPU driver is online; one of the GPU drivers at the plurality of operating systems acting as a host GPU driver by initialising the GPU so as to load the GPU firmware at the GPU; and responsive to loading at the GPU, the GPU firmware updating its firmware state register for each operating system so as to indicate that the GPU firmware is online; wherein: each GPU driver is configured to submit tasks for processing at the GPU only if its respective firmware state register indicates that the GPU firmware is online; and the GPU is configured to process tasks for an operating system only if the respective OS state register of that operating system indicates that the GPU driver is online. 19. The method of claim 18 , wherein the configuring the one or more memory management units includes granting access to configuration registers of the GPU to one of the plurality of operating systems, each GPU driver is configured to, on loading at its operating system, determine whether it has access to the configuration registers, and, if a GPU driver has access to the configuration registers, that GPU driver configuring itself in host mode as the host GPU driver. 20. A non-transitory computer readable storage medium having stored thereon a computer readable dataset description of an integrated circuit that, when processed in an integrated ci

Assignees

Inventors

Classifications

  • by exceeding a time limit, i.e. time-out, e.g. watchdogs · CPC title

  • Processor architectures; Processor configuration, e.g. pipelining · CPC title

  • Special purpose registers · CPC title

  • G06F9/455Primary

    Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines · CPC title

  • Logical partitioning of resources; Management or configuration of virtualized resources (specific details on emulation or internal functioning of virtual machines G06F9/455) · CPC title

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Frequently asked questions

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What does patent US12056499B2 cover?
A computer system has a plurality of operating systems, each operating system including a GPU driver; a graphics processing unit (GPU) including GPU firmware for controlling the execution of tasks at the graphics processing unit and, for each operating system: a firmware state register modifiable by the GPU firmware and indicating whether the GPU firmware is online; and an OS state register mod…
Who is the assignee on this patent?
Imagination Tech Ltd
What technology area does this patent fall under?
Primary CPC classification G06F9/455. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 06 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).