Display panel and display device

US12048210B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12048210-B2
Application numberUS-202117425733-A
CountryUS
Kind codeB2
Filing dateJan 25, 2021
Priority dateFeb 19, 2020
Publication dateJul 23, 2024
Grant dateJul 23, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display panel includes a substrate, a plurality of data lines, at least one circle of barrier wall structure, and a connector. The substrate includes a display area, and a peripheral area which surrounds the display area and includes a fan-out area. The plurality of data lines are located on one side of the substrate and in the display area, extending from the display area to the fan-out area. The at least one circle of barrier wall structure surrounds the display area, and at least a part of the at least one circle of barrier wall structure is located in the fan-out area. The connector is located between the plurality of data lines and the barrier wall structure, and one end, away from the substrate, of the connector extends into the barrier wall structure to fasten the barrier wall structure.

First claim

Opening claim text (preview).

What is claimed is: 1. A display panel, comprising: a substrate comprising a display area and a peripheral area which surrounds the display area and comprises a fan-out area; a plurality of sub-pixels located in the display area; a plurality of data lines located on one side of the substrate and in the display area, extending from the display area to the fan-out area, and arranged to provide data signals to the plurality of sub-pixels; at least one circle of barrier wall structure surrounding the display area, wherein at least a part of the at least one circle of barrier wall structure is located in the fan-out area, and the at least one circle of barrier wall structure is located on one side, away from the substrate, of the plurality of data lines; and a connector located between the plurality of data lines and the at least one circle of barrier wall structure, wherein one end, away from the substrate, of the connector extends into the at least one circle of barrier wall structure to fasten the at least one circle of barrier wall structure. 2. The display panel according to claim 1 , further comprising: an insulating layer located between the plurality of data lines and the at least one circle of barrier wall structure, wherein the connector is arranged between the insulating layer and the at least one circle of barrier wall structure, and one end of the connector, facing the substrate, is embedded into the insulating layer. 3. The display panel according to claim 2 , wherein the insulating layer is provided with via holes, and the connector is in contact connection with the data lines through the via holes. 4. The display panel according to claim 3 , wherein the plurality of data lines comprise a plurality of first data lines and a plurality of second data lines, the insulating layer comprises a first insulating layer, the first insulating layer is located on one side, away from the substrate, of the plurality of first data lines, and the plurality of second data lines are located on one side, away from the substrate, of the first insulating layer; the connector comprises a first connector and a second connector, the via holes comprise a first via hole formed on the first insulating layer, the first connector is in contact connection with a first data line through the first via hole, and the second connector is in contact connection with a second data line. 5. The display panel according to claim 4 , wherein the insulating layer further comprises a second insulating layer, wherein the second insulating layer is located on one side, away from the substrate, of the plurality of second data lines, the first via hole penetrates the first insulating layer and the second insulating layer, the via holes further comprise a second via holes formed on the second insulating layer, and the second connector is in contact connection with a second data line through the second via hole. 6. The display panel according to claim 1 , wherein a material of the connector comprises metal, the display panel further comprises an inorganic encapsulating layer arranged on one side, away from the substrate, of the at least one circle of barrier wall structure. 7. The display panel according to claim 1 , wherein the sub-pixels comprise thin-film transistors, and the connector and source electrodes or drain electrodes of the thin-film transistors are arranged in the same layer. 8. The display panel according to claim 1 , wherein the at least one circle of barrier wall structure comprises a first circle of barrier wall, the first circle of barrier wall comprises a first sub-barrier wall and a second sub-barrier wall which are sequentially stacked, the first sub-barrier wall faces the substrate, and one end, away from the substrate, of the connector extends into the first sub-barrier wall. 9. The display panel according to claim 8 , wherein the at least one circle of barrier wall structure further comprises a second circle of barrier wall, the second circle of barrier wall is located on one side, away from the display area, of the first circle of barrier wall, and comprises a third sub-barrier wall, a fourth sub-barrier wall, and a fifth sub-barrier wall which are sequentially stacked, the third sub-barrier wall faces the substrate, and one end, away from the substrate, of the connector extends into the third sub-barrier wall. 10. The display panel according to claim 9 , further comprising a flat layer located in the display area, wherein the flat layer is located on one side, away from the substrate, of the connector, and the third sub-barrier wall and the flat layer are arranged in the same layer. 11. The display panel according to claim 10 , further comprising a pixel definition layer located in the display area, wherein the pixel definition layer is located on one side, away from the substrate, of the flat layer, and both the first sub-barrier wall and the fourth sub-barrier wall are arranged in the same layer as the pixel definition layer. 12. The display panel according to claim 9 , wherein the second sub-barrier wall and the fifth sub-barrier wall are arranged in the same layer. 13. A display device, comprising the display panel according to claim 1 . 14. The display panel according to claim 2 , wherein the at least one circle of barrier wall structure comprises a first circle of barrier wall, the first circle of barrier wall comprises a first sub-barrier wall and a second sub-barrier wall which are sequentially stacked, the first sub-barrier wall faces the substrate, and one end, away from the substrate, of the connector extends into the first sub-barrier wall. 15. The display panel according to claim 14 , wherein the at least one circle of barrier wall structure further comprises a second circle of barrier wall, the second circle of barrier wall is located on one side, away from the display area, of the first circle of barrier wall, and comprises a third sub-barrier wall, a fourth sub-barrier wall, and a fifth sub-barrier wall which are sequentially stacked, the third sub-barrier wall faces the substrate, and one end, away from the substrate, of the connector extends into the third sub-barrier wall. 16. The display panel according to claim 15 , further comprising a flat layer located in the display area, wherein the flat layer is located on one side, away from the substrate, of the connector, and the third sub-barrier wall and the flat layer are arranged in the same layer. 17. The display panel according to claim 16 , further comprising a pixel definition layer located in the display area, wherein the pixel definition layer is located on one side, away from the substrate, of the flat layer, and both the first sub-barrier wall and the fourth sub-barrier wall are arranged in the same layer as the pixel definition layer. 18. The display panel according to claim 15 , wherein the second sub-barrier wall and the fifth sub-barrier wall are arranged in the same layer. 19. The display panel according to claim 3 , wherein the at least one circle of barrier wall structure comprises a first circle of barrier wall, the first circle of barrier wall comprises a first sub-barrier wall and a second sub-barrier wall which are sequentially stacked, the first sub-barrier wall faces the substrate, and one end, away from the substrate, of the connector extends into the first sub-barrier wall. 20. The display panel according to claim 19 , wherein the at least one circle of barrier wall structure further comprises a second circle of barrier wall, the second circle of barrie

Assignees

Inventors

Classifications

  • Encapsulations · CPC title

  • the pixel elements being TFTs · CPC title

  • Pixel-defining structures or layers, e.g. banks · CPC title

  • Insulating layers formed between TFT elements and OLED elements · CPC title

  • H10K59/131Primary

    Interconnections, e.g. wiring lines or terminals · CPC title

Patent family

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Frequently asked questions

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What does patent US12048210B2 cover?
A display panel includes a substrate, a plurality of data lines, at least one circle of barrier wall structure, and a connector. The substrate includes a display area, and a peripheral area which surrounds the display area and includes a fan-out area. The plurality of data lines are located on one side of the substrate and in the display area, extending from the display area to the fan-out area…
Who is the assignee on this patent?
Chengdu Boe Optoelect Tech Co, Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/131. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 23 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).