Memory system

Patent metadata

Field	Value
Publication number	US-12046300-B2
Application number	US-202318459501-A
Country	US
Kind code	B2
Filing date	Sep 1, 2023
Priority date	Dec 11, 2020
Publication date	Jul 23, 2024
Grant date	Jul 23, 2024

Abstract

According to one embodiment, a memory system includes a nonvolatile memory and a memory controller configured to cause the nonvolatile memory to execute a first process of reading data based on a first request from a host device. The memory controller is configured to, when the first request is received from the host device while causing the nonvolatile memory to execute a second process, hold interruption of the second process until a first number becomes a first threshold value or more. The first number is a number of the first requests to be performed in the memory controller. The first threshold value is an integer of 2 or more.

First claim

The invention claimed is:

1. A method of controlling a nonvolatile memory, comprising:
causing the nonvolatile memory to execute a first process of reading data based on one or more first requests from a host;
determining that one of the first requests is received from the host while causing the nonvolatile memory to execute a second process; and
in response to determining that the one of the first requests is received from the host while causing the nonvolatile memory to execute the second process, holding interruption of the second process until a first number becomes a first threshold value or larger, the first number being the number of the first requests to be performed, the first threshold value being an integer of two or more.

2. The method according to claim 1 , further comprising:
determining that a first period becomes a second threshold value or longer while holding the interruption of the second process, the first period being a consecutive period during which the first number is one or larger; and
in response to determining that the first period becomes the second threshold value or longer while holding the interruption of the second process, interrupting the second process.

3. The method according to claim 1 , further comprising:
determining that a second period becomes a third threshold value or longer while holding the interruption of the second process and the first number is one or larger, the second period being a consecutive period during which the second process is executed and does not include a period during which the second process is interrupted; and
in response to determining that the second period becomes the third threshold value or longer while holding the interruption of the second process and the first number is one or larger, interrupting the second process.

4. The method according to claim 3 , wherein
a starting point of the second period is when the second process is started.

5. The method according to claim 3 , wherein
a starting point of the second period is when the second process is resumed from the interruption.

6. The method according to claim 3 , wherein
the nonvolatile memory includes a memory cell array and a page buffer,
the second process is a program process to program data from the page buffer to the memory cell array, and
a starting point of the second period is when the program process is started.

7. The method according to claim 3 , wherein
the nonvolatile memory includes a memory cell array and a page buffer,
the second process is a program process to program data from the page buffer to the memory cell array, and
a starting point of the second period is when a data-in process to transfer the data to the page buffer is started.

8. The method according to claim 1 , further comprising:
interrupting the second process; and
holding resuming of the interrupted second process until a third period becomes a fourth threshold value or longer while the second process is interrupted, the third period being a consecutive period during which the second process is interrupted.

9. The method according to claim 1 , further comprising:
interrupting the second process; and
while the second process is interrupted:
causing the nonvolatile memory to execute the first process; and
holding resuming of the interrupted second process until a fourth period becomes a fifth threshold value or longer, the fourth period being a consecutive period during which the second process is interrupted and the first process is not executed.

10. The method according to claim 1 , further comprising:
interrupting the second process; and
determining that a fifth period becomes a sixth threshold value or longer while the second process is interrupted, the fifth period being a period during which the second process is interrupted; and
in response to determining that the fifth period becomes the sixth threshold value or longer while the second process is interrupted, resuming the interrupted second process.

11. The method according to claim 10 , wherein
the fifth period is a consecutive period.

12. The method according to claim 10 , wherein
the fifth period is a cumulative period of one or more periods during which the second process is interrupted.

13. The method according to claim 1 , wherein
the method is executed in a memory system, and the method further comprises:
changing the first threshold value on the basis of characteristics of a workload of the memory system or a second request from the host, the characteristics of the workload including at least one of the first number, an idle time of the memory system, and an amount of data received from the host to be written in the nonvolatile memory.

14. The method according to claim 2 , wherein
the method is executed in a memory system, and the method further comprises:
changing the second threshold value on the basis of characteristics of a workload of the memory system or a second request from the host, the characteristics of the workload including at least one of the first number, an idle time of the memory system, and an amount of data received from the host to be written in the nonvolatile memory.

15. The method according to claim 3 , wherein
the method is executed in a memory system, and the method further comprises:
changing the third threshold value on the basis of characteristics of a workload of the memory system or a second request from the host, the characteristics of the workload including at least one of the first number, an idle time of the memory system, and an amount of data received from the host to be written in the nonvolatile memory.

16. The method according to claim 1 , wherein
the second process includes a program process or an erase process.

17. A method of controlling a nonvolatile memory, the nonvolatile memory including a first plane and a second plane, said method comprising:
causing the nonvolatile memory to execute a first process of reading data from the first plane and the second plane in parallel on the basis of one or more first requests corresponding to the first plane and one or more second requests corresponding to the second plane;
determining that one of the first requests or one of the second requests is received from the host while causing the nonvolatile memory to execute a second process; and
in response to determining that the one of the first requests or the one of the second requests is received while causing the nonvolatile memory to execute the second process, holding interruption of the second process until both of a first number and a second number become a first threshold value or larger, the first number being the number of the first requests to be performed, the second number being the number of the second requests to be performed, the first threshold value being an integer of one or more.

18. The method according to claim 17 , further comprising:
determining that a first period becomes a second threshold value or longer while holding the interruption of the second process, the first period being a consecutive period during which the first number or the second number is one or larger; and
in response to determining that the first period becomes the second threshold value or longer while holding the interruption of the second process, interrupting the second process.

19. The method according to claim 17 , further comprising:
determining that a sum of the first number and the second number becomes a second threshold value or larger while holding the interruption of

Assignees

• Kioxia Corp

Inventors

• Kamata Tomoya
• Kojima Yoshihisa
• Nishikawa Suguru

Classifications

• G11C7/22

  Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management · CPC title

• G06F13/26

  with priority control · CPC title

• G11C16/10

  Programming or data input circuits · CPC title

• G11C16/26

  Sensing or reading circuits; Data output circuits · CPC title

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title