Estimation of an inductance in a power converter

US12040710B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12040710-B2
Application numberUS-202217699269-A
CountryUS
Kind codeB2
Filing dateMar 21, 2022
Priority dateDec 21, 2021
Publication dateJul 16, 2024
Grant dateJul 16, 2024

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Abstract

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Circuitry for estimating an inductance of an inductor in power converter circuitry, the circuitry comprising: circuitry for generating a peak inductor current signal indicative of a peak inductor current during an operational cycle of the power converter circuitry; circuitry for generating a ripple current estimate signal, indicative of an estimate of a ripple current in the power converter circuitry; and circuitry for applying the ripple current estimate signal to the peak inductor current signal to generate an average inductor current threshold signal indicative of an estimated average inductor current in the power converter circuitry during the operational cycle, wherein the ripple current estimate signal is based on: a duration of a charging phase of operation of the power converter circuitry; a voltage across the inductor; and an inductance value for the inductor; and wherein the circuitry for generating the ripple current estimate signal is operative to select an inductance value for the inductor for which the estimated average inductor current is equal to an actual average inductor current during the operational cycle to generate a value for the actual inductance of the inductor.

First claim

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The invention claimed is: 1. Circuitry for estimating an inductance of an inductor in power converter circuitry, the circuitry for estimating an inductance of an inductor comprising: circuitry for generating a peak inductor current signal indicative of a peak inductor current during an operational cycle of the power converter circuitry; circuitry for generating a ripple current estimate signal, indicative of an estimate of a ripple current in the power converter circuitry; and circuitry for applying the ripple current estimate signal to the peak inductor current signal to generate an average inductor current threshold signal indicative of an estimated average inductor current in the power converter circuitry during the operational cycle, wherein the ripple current estimate signal is based on: a duration of a charging phase of operation of the power converter circuitry; a voltage across the inductor; and an inductance value for the inductor; and wherein the circuitry for generating the ripple current estimate signal is operative to select an inductance value for the inductor for which the estimated average inductor current is equal to an actual average inductor current during the operational cycle to generate a value for the actual inductance of the inductor. 2. Circuitry for estimating an inductance of an inductor according to claim 1 , wherein the circuitry for generating the ripple current estimate signal is operative to adjust the inductance value in discrete steps, and to select the inductance value for which the estimated average inductor current is equal to the actual average inductor current. 3. Circuitry for estimating an inductance of an inductor according to claim 1 , wherein the circuitry for generating the ripple current estimate signal is operative to select the inductance value for the inductor based on: a ripple current estimate determined based on a difference between the peak inductor current and the actual average inductor current; the duration of the charging phase of operation of the power converter circuitry; and the supply voltage to the power converter circuitry. 4. Circuitry for estimating an inductance of an inductor according to claim 1 , wherein the circuitry for generating the ripple current estimate signal is operative to select the inductance value for the inductor based on a predetermined relationship between the ripple current estimate and a change in the inductance value that would cause the estimated average inductor current to be equal to an actual average inductor current during the operational cycle. 5. Circuitry for estimating an inductance of an inductor according to claim 1 , further comprising comparison circuitry for generating a signal indicative of whether the actual average inductor current differs from the estimated average inductor current. 6. Circuitry for estimating an inductance of an inductor according to claim 5 , wherein the comparison circuitry is configured to compare: a first period equal to half the duration of a charging or discharging phase of the power converter circuitry, to a second period equal to a time taken for the inductor current in the power converter circuitry to reach the average current threshold. 7. Circuitry for estimating an inductance of an inductor according to claim 5 , wherein the comparison circuitry is configured to compare: a first period equal to a duration of a charging or discharging phase of the power converter circuitry; to a second period equal to twice the time taken for the inductor current in the power converter circuitry to reach the average current threshold. 8. Circuitry for estimating an inductance of an inductor according to claim 5 , wherein the comparison circuitry comprises digital counter circuitry configured to generate a first count value indicative of the first period and a second count value indicative of the second period. 9. Circuitry for estimating an inductance of an inductor according to claim 8 , wherein the comparison circuitry further comprises digital comparison circuitry operative to compare the first count value to the second count value and to generate a comparator output signal based on the comparison. 10. Circuitry for estimating an inductance of an inductor according to claim 4 , wherein the comparison circuitry further comprises current monitor circuitry configured to generate a signal indicative of the actual inductor current. 11. Circuitry for estimating an inductance of an inductor according to claim 1 , wherein the circuitry for generating the peak inductor current signal comprises control circuitry configured to receive a first signal indicative of a target output voltage and a second signal indicative of an actual output voltage of the power converter circuitry and to generate the peak inductor current signal based on the first and second received signals. 12. Circuitry for estimating an inductance of an inductor according to claim 11 , wherein the circuitry for applying the ripple current estimate signal is configured to generate and apply an additional DC voltage to the peak inductor current signal. 13. Circuitry for estimating an inductance of an inductor according to claim 11 , further comprising comparator circuitry configured to compare a signal indicative of the actual average inductor current during operation of the power converter circuitry to a threshold that is based on the average inductor current threshold signal. 14. Circuitry for estimating an inductance of an inductor according to claim 13 , wherein the control circuitry, the circuitry for applying the ripple current estimate signal, and the comparator circuitry form a control loop for regulating an output voltage of the power converter circuitry. 15. Circuitry for estimating an inductance of an inductor according to claim 1 , wherein the power converter circuitry comprises boost converter circuitry. 16. An integrated circuit comprising circuitry for estimating an inductance of an inductor according to claim 1 . 17. A host device comprising circuitry for estimating an inductance of an inductor according to claim 1 . 18. A host device according to claim 17 , wherein the host device comprises a laptop, notebook, netbook or tablet computer, a gaming device, a games console, a controller for a games console, a virtual reality (VR) or augmented reality (AR) device, a mobile telephone, a portable audio player, a portable device, an accessory device for use with a laptop, notebook, netbook or tablet computer, a gaming device, a games console a VR or AR device, a mobile telephone, a portable audio player or other portable device.

Assignees

Inventors

Classifications

  • Devices or circuits for detecting current in a converter · CPC title

  • Measuring inductance · CPC title

  • Testing power supplies (testing photovoltaic devices H02S50/10) · CPC title

  • Arrangements for modifying reference values, feedback values or error values in the control loop of a converter · CPC title

  • Arrangements for reducing ripples from DC input or output · CPC title

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What does patent US12040710B2 cover?
Circuitry for estimating an inductance of an inductor in power converter circuitry, the circuitry comprising: circuitry for generating a peak inductor current signal indicative of a peak inductor current during an operational cycle of the power converter circuitry; circuitry for generating a ripple current estimate signal, indicative of an estimate of a ripple current in the power converter cir…
Who is the assignee on this patent?
Cirrus Logic Int Semiconductor Ltd, Cirrus Logic Inc
What technology area does this patent fall under?
Primary CPC classification H02M3/158. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 16 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).