Electronic apparatus and manufacturing method thereof

US12034002B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12034002-B2
Application numberUS-202217678040-A
CountryUS
Kind codeB2
Filing dateFeb 23, 2022
Priority dateJul 29, 2019
Publication dateJul 9, 2024
Grant dateJul 9, 2024

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

The disclosure provides an electronic apparatus and a manufacturing method thereof. The electronic apparatus includes a first insulating layer, a first metal layer, a second metal layer, and an electronic assembly. The first insulating layer includes a first surface and a second surface opposite to the first surface. The first metal layer has an opening and is formed on the first surface. The second metal layer is formed on the second surface and a projection of the opening on the second surface is overlapped with a projection of the second metal layer on the second surface. The electronic assembly is electrically connected with the first metal layer and the second metal layer.

First claim

Opening claim text (preview).

What is claimed is: 1. An electrical apparatus, comprising: a first insulating layer, comprising a first surface and a second surface opposite to the first surface; a first metal layer, having an opening and formed on the first surface; a second metal layer, formed on the second surface, wherein a projection of the opening on the second surface is overlapped with a projection of the second metal layer on the second surface; and an electronic assembly, electrically connected with the first metal layer and the second metal layer, wherein the electronic assembly comprises a PN junction assembly, and the PN junction assembly comprises a variable capacitor. 2. The electronic apparatus as claimed in claim 1 , further comprising: a transistor circuit, electrically connected with the electronic assembly. 3. The electronic apparatus as claimed in claim 2 , further comprising: a routing layer, formed on the second surface and electrically connected with the transistor circuit; and a control circuit, electrically connected with the routing layer to be electrically connected with the transistor circuit via the routing layer. 4. The electronic apparatus as claimed in claim 1 , wherein the electronic assembly further comprises a solar cell or an integrated circuit. 5. The electronic apparatus as claimed in claim 1 , wherein the first insulating layer comprises a flexible substrate material.

Assignees

Inventors

Classifications

  • the multiple chips being integrally enclosed · CPC title

  • Configurations of laterally-adjacent chips · CPC title

  • characterised by multiple insulating or insulated package substrates, interposers or RDLs · CPC title

  • H10W70/611Primary

    for connecting multiple chips together · CPC title

  • Capacitor integral with wiring layers · CPC title

Patent family

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External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US12034002B2 cover?
The disclosure provides an electronic apparatus and a manufacturing method thereof. The electronic apparatus includes a first insulating layer, a first metal layer, a second metal layer, and an electronic assembly. The first insulating layer includes a first surface and a second surface opposite to the first surface. The first metal layer has an opening and is formed on the first surface. The s…
Who is the assignee on this patent?
Innolux Corp
What technology area does this patent fall under?
Primary CPC classification H10W70/611. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 09 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).