Display device and system

Patent metadata

Field	Value
Publication number	US-12032158-B2
Application number	US-202017097291-A
Country	US
Kind code	B2
Filing date	Nov 13, 2020
Priority date	Nov 13, 2019
Publication date	Jul 9, 2024
Grant date	Jul 9, 2024

Abstract

A logic circuit comprises a logic sub-circuit arranged to output a stream, S1, of Fresnel lens values, F(x), of a Fresnel lens for display on [m×n] pixels of a pixelated display device, and an iterative method outputs a stream, S1, of Fresnel lens values, F(x), of a Fresnel lens for display on [m×n] pixels of a pixelated display device. The circuit and method can reduce the number of multiplications used to provide each value of a stream of display values for the display device, wherein the display values include values of a Fresnel lens function. Accordingly, they can be implemented in an advanced integrated circuit, such as a field-programmable gate array.

First claim

The invention claimed is:

1. A holographic projector comprising:
a pixelated display device;
a light source arranged to illuminate the pixelated display device with light having a wavelength, λ; and
a logic circuit comprising a first logic sub-circuit arranged to output a stream, S1, of Fresnel lens values, F(x), of a Fresnel lens for display on [m×n] pixels of the pixelated display device, wherein the logic circuit is arranged to:
(a) set an initial data value stored in a first data register unit of the first logic sub-circuit to (a−k) 2 and set an initial data value stored in a second data register unit of the first logic sub-circuit to a 2 −(a−k) 2 ;
(b) in a first iteration, read the initial data value stored in the first data register unit of the first logic sub-circuit and the initial data value stored in the second data register unit of the first logic sub-circuit, or in a further iteration, read the data value stored in the first data register unit of the first logic sub-circuit in the preceding iteration and the data value stored in the second data register unit of the first logic sub-circuit in the preceding iteration;
(c) sum the data value read from the first data register unit of the first logic sub-circuit and the data value read from the second data register unit of the first logic sub-circuit to form x 2 ;
(d) calculate F(x) based on x 2 ;
(e) output F(x) as the next value in the stream of F(x) values;
(f) write x 2 to the first data register unit of the first logic sub-circuit;
(g) add 2k 2 to the value stored in the second data register unit of the first logic sub-circuit; and
(h) perform further iterations that repeat steps (b) to (g) for x=a+k, a+2k, a+3k . . . a+(n−1)k, wherein a is the starting value of x, k is an increment in x and F(a) is the first value of stream, S1,

wherein the pixelated display device is configured to display a light modulation pattern comprising a Fresnel lens pattern in accordance with the stream of Fresnel lens values, F(x), and to modulate light having the wavelength 2 received from the light source with the light modulation pattern.

2. The holographic projector as claimed in claim 1 , wherein the logic circuit comprises a plurality, k, of first logic sub-circuits, wherein the plurality of first logic sub-circuits are arranged in parallel and each first logic sub-circuit is arranged to output a respective stream, S1, S2 . . . Sk, of Fresnel lens values, F(x), by performing steps (a) to (h) using a respective value of a, wherein the streams, S1, S2 . . . Sk, correspond to a=x 1 , x 1 +1, x 1 +2 . . . x 1 +(k−1), respectively.

3. The holographic projector as claimed in claim 1 wherein x 1 =−n/2 or x 1 =1−n/2.

4. The holographic projector claimed in claim 1 wherein F(x) is calculated based on x 2 using the following equation:

F
⁡

(
x
)

=

π
⁢

⁢

p
x
2

f
x

⁢
λ

⁢

x
2

wherein f x is the focal length of the Fresnel lens in the x-direction, λ is the wavelength of light and p x is the pixel size of the pixelated display device in the x-direction.

5. The holographic projector as claimed in claim 1 wherein the first data register unit of the first logic sub-circuit comprises a first input register, a first data register and a first multiplexer for selecting between a data value stored in the first input register and a data value stored in the first data register, and the second data register unit of the first logic sub-circuit comprises a second input register, a second data register and a second multiplexer for selecting between a data value stored in the second input register and a data value stored in the second data register, wherein the logic circuit is further arranged to:
provide a reset signal to the first and second multiplexers in the first iteration of step (b), in order to select the initial data values stored in the respective first and second input registers, and
not provide a reset signal to the first and second multiplexers in further iterations of step (b), in order to select the data values stored in the respective first and second data registers in the preceding iteration.

6. The holographic projector as claimed in claim 1 further arranged to output a stream of Fresnel lens values, F(y), of the Fresnel lens, wherein the logic circuit is arranged to perform the following steps iteratively for y=b, b+1, b+2, . . . (b+m−1):
(i) if y=b, set an initial data value stored in a first data register unit of a second logic sub-circuit to (b−1) 2 and set an initial data value stored in a second data register unit of the second logic sub-circuit to b 2 −(b−1) 2 ;
(j) if y=b, read the initial data value stored in the first data register unit of the second logic sub-circuit and the initial data value stored in the second data register unit of the second logic sub-circuit, or if y≠b, read the data value stored in the first data register unit of the second logic sub-circuit in the preceding iteration and the data value stored in the second data register unit of the second logic sub-circuit in the preceding iteration;
(k) sum the data value read from the first data register unit of the second logic sub-circuit and the data value read from the second data register unit of the second logic sub-circuit to form y 2 ;
(l) calculate F(y) based on y 2 ;
(m) output F(y) as the next value in the stream of F(y) values;
(n) write y 2 to the first data register unit of the second logic sub-circuit; and
(o) add two to the value stored in the second data register unit of the second logic sub-circuit,

wherein b is the starting value of y and F(b) is the first value of the stream of Fresnel lens values, F(y).

7. The holographic projector as claimed in claim 6 wherein
b=−m/2 or 1−m/2.

8. The holographic projector as claimed in claim 6 wherein the logic circuit is arranged to calculate F(y) based on y 2 using the following equation:

F
⁡

(
y
)

=

π
⁢

⁢

p
y
2

f
y

⁢
λ

⁢

y
2

wherein f y is the focal length of the Fresnel len

Assignees

• Dualitas Ltd

Inventors

• Collin Mikael

Classifications

• G03H2001/0816

  Iterative algorithms · CPC title

• G03H2001/0224

  Active addressable light modulator, i.e. Spatial Light Modulator [SLM] · CPC title

• G03H1/2294

  Addressing the hologram to an active spatial light modulator · CPC title

• G03H2001/0825

  Numerical processing in hologram space, e.g. combination of the CGH [computer generated hologram] with a numerical optical element · CPC title

• G03H1/0808

  Methods of numerical synthesis, e.g. coherent ray tracing [CRT], diffraction specific · CPC title