MEMS image forming element with built-in voltage generator

US12030772B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12030772-B2
Application numberUS-202016841044-A
CountryUS
Kind codeB2
Filing dateApr 6, 2020
Priority dateApr 6, 2019
Publication dateJul 9, 2024
Grant dateJul 9, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure describes an image forming element having a semiconductor chip with micro-electro-mechanical-system (MEMS) devices and voltage generators, each voltage generator being configured to generate a voltage used by one or more of the MEMS devices. A floating ground may be used to add a voltage to the voltage generated by the voltage generators. The semiconductor chip may include electrical connections, where each voltage generator is configured to provide the voltage to the one or more MEMS devices through the electrical connections. The MEMS devices may define a boundary in the semiconductor chip within which the MEMS devices, the voltage generators, and the electrical connections are located. Each MEMS device may generate an electrostatic field to manipulate an electron beamlet of a multi-beam charged particle microscope. The MEMS devices may be organized into groups based on a distance to a reference location (e.g., optical axis) in the semiconductor chip.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor chip, comprising: a base layer, comprising: a plurality of micro-electro-mechanical-system (MEMS) devices formed in the base layer; and a plurality of voltage generators formed in the base layer, each of the voltage generators configured to generate a voltage used by a corresponding one or more of the MEMS devices; and a plurality of electrical connections formed above the base layer, each of the voltage generators configured to provide the voltage to the one or more MEMS devices through one or more of the electrical connections, wherein each of the MEMS devices is configured to generate an electric field to manipulate an electron beamlet of a plurality of electron beamlets in a multi-beam charged particle microscope. 2. The semiconductor chip of claim 1 , wherein the charged particle microscope includes one of a scanning electron microscope (SEM), a scanning ion microscope, a transmission electron microscope (TEM), or a scanning proton microscope. 3. The semiconductor chip of claim 1 , wherein each of the MEMS devices is a micro lens, a micro deflector, or a stigmator. 4. The semiconductor chip of claim 1 , wherein a number of the MEMS devices is the same or greater than a number of the voltage generators. 5. The semiconductor chip of claim 1 , wherein a number of the MEMS devices is smaller than a number of the voltage generators. 6. The semiconductor chip of claim 1 , wherein each of the electrical connections includes a plurality of wires. 7. The semiconductor chip of claim 1 , wherein the MEMS devices are arranged into a plurality of subsets, the voltage generators include one voltage generator for each subset, and the one voltage generator is configured to generate a voltage for each of the MEMS devices in the respective subset. 8. The semiconductor chip of claim 7 , wherein the one voltage generator is configured to provide the voltage to each of the MEMS devices in the respective subset through a separate one of the electrical connections. 9. The semiconductor chip of claim 7 , wherein each of the MEMS devices in the respective subset is a micro lens having a single electrostatic element to which the voltage is applied. 10. The semiconductor chip of claim 7 , wherein a number of MEMS devices in each subset is the same. 11. The semiconductor chip of claim 7 , wherein a number of MEMS devices is different for different subsets. 12. The semiconductor chip of claim 7 , wherein the one voltage generator is located at a center of the MEMS devices in the respective subset. 13. The semiconductor chip of claim 1 , wherein the MEMS devices are arranged into a plurality of subsets, the voltage generators include one voltage generator for each subset, and the one voltage generator is configured to generate multiple voltages for each of the MEMS devices in the respective subset. 14. The semiconductor chip of claim 13 , wherein the one voltage generator is configured to provide the multiple voltages to each of the MEMS devices in the respective subset through multiple, separate ones of the electrical connections. 15. The semiconductor chip of claim 13 , wherein each of the MEMS devices in the respective subset is a micro deflector or a stigmator having multiple electrostatic elements to which the multiple voltages are respectively applied.

Assignees

Inventors

Classifications

  • B81B7/02Primary

    containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS] (B81B7/04 takes precedence) · CPC title

  • Interconnections between the MEMS and external electrical signals · CPC title

  • Sensors not provided for in B81B2201/0207 - B81B2201/0285 · CPC title

  • Optical MEMS not provided for in B81B2201/042 - B81B2201/045 · CPC title

  • MEMS characterised by an electronic circuit specially adapted for controlling or driving the same (B81B7/0087 takes precedence; arrangements for starting, regulating, braking, or otherwise controlling an actuator H02N; control arrangements or circuits for visual indicators G09G3/00) · CPC title

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Frequently asked questions

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What does patent US12030772B2 cover?
The present disclosure describes an image forming element having a semiconductor chip with micro-electro-mechanical-system (MEMS) devices and voltage generators, each voltage generator being configured to generate a voltage used by one or more of the MEMS devices. A floating ground may be used to add a voltage to the voltage generated by the voltage generators. The semiconductor chip may includ…
Who is the assignee on this patent?
Asml Netherlands Bv
What technology area does this patent fall under?
Primary CPC classification B81B7/02. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Jul 09 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).