Load dependent discharge for voltage controlled oscillator-based charge pump regulator

Patent metadata

Field	Value
Publication number	US-12028078-B2
Application number	US-202217823567-A
Country	US
Kind code	B2
Filing date	Aug 31, 2022
Priority date	Aug 31, 2022
Publication date	Jul 2, 2024
Grant date	Jul 2, 2024

Abstract

A pulse generator circuit includes a charge pump having a charge pump output. A voltage divider is coupled to the charge pump output. The voltage divider has a voltage divider output. An error amplifier has a first error amplifier input and a second error amplifier input. The first error amplifier input is coupled to the voltage divider output. A dependent current source circuit has a first input coupled to the charge pump output, a second input coupled to the voltage divider output, and a third input coupled to the second error amplifier input. The dependent current source is configured to cause a current to flow from the charge pump output that is proportional to a difference between a first voltage at the voltage divider output and a second voltage at the second error amplifier input.

First claim

What is claimed is:

1. A pulse generator circuit, comprising:
a charge pump having a charge pump output;
a voltage divider coupled to the charge pump output, the voltage divider having a voltage divider output;
an error amplifier having a first error amplifier input and a second error amplifier input, the first error amplifier input coupled to the voltage divider output; and
a dependent current source circuit having a first input coupled to the charge pump output, a second input coupled to the voltage divider output, and a third input coupled to the second error amplifier input, the dependent current source circuit configured to cause a current to flow from the charge pump output that is proportional to a difference between a first voltage at the voltage divider output and a second voltage at the second error amplifier input, wherein:
a first transistor having a first control input coupled to the second error amplifier input; and
a second transistor having a second control input coupled to the voltage divider output; and

wherein the dependent current source circuit includes:
a first current mirror coupled to a first current source circuit, the first current mirror configured to provide a first current through the first transistor; and
a second current mirror coupled to a second current source circuit, the second current mirror configured to provide a second current through the second transistor responsive to the first voltage being larger than the second voltage.

2. The pulse generator circuit of claim 1 , wherein the dependent current source circuit comprises:
a first current path configured to provide a first current; and
a second current path configured to provide a second current that is a function of the difference between the first and second voltages.

3. The pulse generator circuit of claim 2 , further comprising a current mirror coupled to a current source circuit, the current mirror coupled to the first current path.

4. The pulse generator circuit of claim 2 , further comprising a current mirror comprising a third transistor coupled to a fourth transistor, the third transistor coupled to the first and second current paths, and the fourth transistor coupled between the charge pump output and a ground terminal, the fourth transistor configured to cause the current to flow from the charge pump output.

5. The pulse generator circuit of claim 4 , further comprising a fifth transistor coupled between the charge pump output and the fourth transistor.

6. The pulse generator circuit of claim 1 , wherein the error amplifier has an error amplifier output, the charge pump has a charge pump input, and the pulse generator circuit comprises:
a filter having a filter input coupled to the error amplifier output, the filter having a filter output; and
a voltage-controlled oscillator (VCO) having a VCO control input and having a VCO output coupled to the charge pump input.

7. An integrated circuit (IC), comprising:
a voltage circuit having a voltage circuit output;
a voltage divider coupled to the voltage circuit output, the voltage divider having a voltage divider output;
an amplifier having a first amplifier input and a second amplifier input, the first amplifier input coupled to the voltage divider output; and
a current source circuit having a first input coupled to the voltage circuit output, a second input coupled to the voltage divider output, and a third input coupled to the second amplifier input, the current source circuit configured to cause a current to flow from the voltage circuit output that is proportional to a difference between a first voltage at the voltage divider output and a second voltage at the second amplifier input, wherein:
a first transistor having a first control input coupled to the second amplifier input; and
a second transistor having a second control input coupled to the voltage divider output; and

wherein the current source circuit includes:
a first current mirror coupled to a first current source circuit, the first current mirror configured to provide a first current through the first transistor; and
a second current mirror coupled to a second current source circuit, the second current mirror configured to provide a second current through the second transistor responsive to the first voltage being larger than the second voltage.

8. The IC of claim 7 , further comprising a third transistor having a third control input, the third control input coupled to the second current mirror.

9. The IC of claim 7 , further comprising a current mirror comprising a third transistor coupled to a fourth transistor, the third transistor coupled to the first and second transistors, and the fourth transistor coupled between the voltage circuit output and a ground terminal, the fourth transistor configured to cause the current to flow from the voltage circuit output.

10. The IC of claim 9 , further comprising a fifth transistor coupled between the voltage circuit output and the fourth transistor.

11. The IC of claim 7 , further comprising a memory coupled to the voltage circuit output.

12. A pulse generator, comprising:
a charge pump having a charge pump output and a charge pump input;
a voltage divider coupled to the charge pump output, the voltage divider having a voltage divider output;
an error amplifier having a first error amplifier input, a second error amplifier input, an error amplifier output, wherein the first error amplifier input is coupled to the voltage divider output;
a first transistor having a first control input and first and second current terminals, wherein the first control input is coupled to the second error amplifier input;
a second transistor having a second control input and third and fourth current terminals, the second and fourth current terminals coupled together, wherein the second control input is coupled to the voltage divider output;
a third transistor having a third control input and fifth and sixth current terminals, the fifth current terminal coupled to the second and fourth current terminals;
a fourth transistor having a fourth control input and seventh and eighth current terminals, the fourth control input coupled to the third control input, and the eight and sixth current terminals coupled together, and the fourth transistor coupled between the charge pump output and a ground terminal;
a filter having a filter input coupled to the error amplifier output, the filter having a filter output; and
a voltage-controlled oscillator (VCO) having a VCO control input and having a VCO output coupled to the charge pump input.

13. The pulse generator of claim 12 , further comprising a fifth transistor coupled between the charge pump output and the seventh current terminal.

14. The pulse generator of claim 13 , wherein the fifth transistor has a fifth control input, and the pulse generator comprises a bias voltage circuit coupled to the charge pump output, the bias voltage circuit having a bias voltage output coupled to the fifth control input.

15. The pulse generator of claim 14 , wherein the bias voltage circuit comprises:
a sixth transistor having a ninth current terminal; and
a seventh transistor having a tenth current terminal, the ninth and tenth current terminals coupled to the fifth control input.

16. The pulse generator of claim 12 , further comprising a fifth transistor having a fifth control input and ninth and tenth current terminals, the fifth control input coupled to the first current terminal, and the tenth current terminal coupled to the second and fourth current terminals.

Assignees

• Texas Instruments Inc

Inventors

• Sinha Rohan
• Kamra Anand

Classifications

• H03K3/0375

  provided with means for increasing reliability; for protection; for ensuring a predetermined initial state when the supply voltage has been applied; for storing the actual state when the supply voltage fails (digital storage cells each combining volatile and non-volatile storage properties G11C14/00) · CPC title

• H02M3/07

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title

• H03K5/2481 Primary

  with at least one differential stage · CPC title

• H03K4/026 Primary

  using digital techniques · CPC title