Dynamic common-mode adjustment for power amplifiers

Patent metadata

Field	Value
Publication number	US-12028030-B2
Application number	US-202217648958-A
Country	US
Kind code	B2
Filing date	Jan 26, 2022
Priority date	Jan 26, 2022
Publication date	Jul 2, 2024
Grant date	Jul 2, 2024

Abstract

Aspects of the present disclosure relate to apparatus and methods for dynamically adjusting the common-mode input signal of a power amplifier, such as a class-D power amplifier. One example power amplifier circuit generally includes a first amplifier having a signal input and a power input; and a common-mode adjustment circuit having a first input coupled to the power input of the first amplifier, having an output coupled to the signal input of the first amplifier, and being configured to generate a common-mode signal to apply to the signal input of the first amplifier, based on a power supply voltage on the power input of the first amplifier.

First claim

What is claimed is:

1. A power amplifier circuit comprising:
a first amplifier having a signal input and a power input; and
a common-mode adjustment circuit having a first input coupled to the power input of the first amplifier, having an output coupled to the signal input of the first amplifier, and being configured to generate a common-mode signal to apply to the signal input of the first amplifier, based on a power supply voltage on the power input of the first amplifier.

2. The power amplifier circuit of claim 1 , wherein the common-mode adjustment circuit is configured, to generate the common-mode signal, to:
determine a common-mode offset based on the power supply voltage on the power input of the first amplifier; and
generate the common-mode signal based on the common-mode offset.

3. The power amplifier circuit of claim 2 , wherein the common-mode adjustment circuit comprises a common-mode generation circuit having a tunable component, wherein the common-mode generation circuit is configured to generate the common-mode signal, and wherein the tunable component is configured to be controlled based on the common-mode offset.

4. The power amplifier circuit of claim 2 , wherein the common-mode adjustment circuit comprises a common-mode generation circuit comprising a second amplifier and configured to:
generate the common-mode signal based on the common-mode offset when the second amplifier has sufficient headroom; and
output a clamped voltage as the common-mode signal when the second amplifier does not have sufficient headroom.

5. The power amplifier circuit of claim 2 , wherein the common-mode adjustment circuit comprises a common-mode generation circuit comprising:
a second amplifier having a first input, a second input, and an output;
a first resistive element coupled between the output of the second amplifier and the output of the common-mode adjustment circuit;
a second resistive element coupled between the output of the common-mode adjustment circuit and the second input of the second amplifier;
a third resistive element coupled between the second input of the second amplifier and a reference potential node of the common-mode generation circuit;
a fourth resistive element coupled between the first input of the second amplifier and the reference potential node;
a fifth resistive element coupled between the first input of the second amplifier and a first power supply rail; and
a tunable current sink coupled between the first input of the second amplifier and the reference potential node.

6. The power amplifier circuit of claim 5 , wherein the tunable current sink is configured to sink a variable amount of current based on the common-mode offset.

7. The power amplifier circuit of claim 5 , wherein a power input of the second amplifier is coupled to a second power supply rail and wherein the second power supply rail is configured to have a lower voltage than the first power supply rail.

8. The power amplifier circuit of claim 7 , wherein the common-mode generation circuit is configured to generate the common-mode signal as a minimum between a predefined maximum value and a difference between:
half of a voltage of the first power supply rail; and
the common-mode offset.

9. The power amplifier circuit of claim 8 , wherein the predefined maximum value is equal to a product of a voltage of the second power supply rail and a quotient between:
a sum of a resistance of the second resistive element and a resistance of the third resistive element; and
a resistance of the first resistive element added to the sum.

10. The power amplifier circuit of claim 5 , wherein a resistance of the fifth resistive element is three times larger than a resistance of the fourth resistive element.

11. The power amplifier circuit of claim 10 , wherein the second resistive element and the third resistive element have equal resistance.

12. The power amplifier circuit of claim 11 , wherein:
the tunable current sink is configured to sink a variable current;
the common-mode signal is equal to twice a difference between:
a voltage of the first power supply rail divided by four; and
a product of the variable current and three-fourths the resistance of the fourth resistive element; and
the variable current is set such that the common-mode signal is equal to a difference between half of the voltage of the first power supply rail and the common-mode offset.

13. The power amplifier circuit of claim 2 , wherein the common-mode adjustment circuit further comprises logic configured to:
determine a zone corresponding to the power supply voltage; and
determine the common-mode offset based on the zone corresponding to the power supply voltage and on battery stack information.

14. The power amplifier circuit of claim 1 , wherein the common-mode adjustment circuit has a second input coupled to an input node of the power amplifier circuit and wherein the common-mode adjustment circuit is configured to apply, to the signal input of the first amplifier, a sum of the common-mode signal and an input signal on the input node.

15. A method of amplification, comprising:
amplifying an input signal with a power amplifier circuit comprising a first amplifier powered by a first power supply voltage at a power supply input of the first amplifier;
sensing the first power supply voltage at the power supply input of the first amplifier;
generating a common-mode signal based on the sensed first power supply voltage; and
applying the common-mode signal to the first amplifier.

16. The method of claim 15 , wherein generating the common-mode signal comprises:
determining a common-mode offset based on the sensed first power supply voltage; and
generating the common-mode signal based on the common-mode offset.

17. The method of claim 16 , wherein generating the common-mode signal comprises adjusting a tunable component based on the common-mode offset.

18. The method of claim 16 , wherein generating the common-mode signal comprises:
generating the common-mode signal with a second amplifier based on the common-mode offset when the second amplifier has sufficient headroom; and
outputting a clamped voltage as the common-mode signal when the second amplifier does not have sufficient headroom.

19. The method of claim 16 , wherein generating the common-mode signal comprises generating the common-mode signal with a common-mode generation circuit based on the common-mode offset, the common-mode generation circuit comprising:
a second amplifier having a first input, a second input, and an output;
a voltage divider having a tap coupled to the first input of the second amplifier;
a feedback circuit coupled between the output and the second input of the second amplifier; and
a tunable current sink coupled to the first input of the second amplifier.

20. The method of claim 19 , wherein generating the common-mode signal comprises generating the common-mode signal as a minimum between a predefined maximum value and a difference between:
half of a second power supply voltage for the voltage divider; and
the common-mode offset.

21. The method of claim 16 , wherein generating the common-mode signal comprises:
determining a zone corresponding to the first power supply voltage; and
determining the common-mode offset based on the zone corresponding to the first power supply voltage and on battery stack information.

22. The method of claim 15 , wherein applying the common-mode signal to the first

Assignees

• Qualcomm Inc

Inventors

• Tang dongyang
• Zhang Xinwang
• Yang Chienchung
• Schreyer Earl
• Galal Sherif

Classifications

• H03F2200/03

  the amplifier being designed for audio applications · CPC title

• H03F2203/45594

  the IC comprising one or more resistors, which are not biasing resistor · CPC title

• H03F2203/45528

  the FBC comprising one or more passive resistors and being coupled between the LC and the IC · CPC title

• H03F2203/45136

  One differential amplifier in IC-block form being shown · CPC title

• H03F2200/66

  Clipping circuitry being present in an amplifier, i.e. the shape of the signal being modified · CPC title