Electrostatic protection structure and electrostatic protection circuit

US12027846B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12027846-B2
Application numberUS-202217790462-A
CountryUS
Kind codeB2
Filing dateMar 23, 2022
Priority dateJan 10, 2022
Publication dateJul 2, 2024
Grant dateJul 2, 2024

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Embodiments of the present disclosure relate to an electrostatic protection structure and an electrostatic protection circuit. The electrostatic protection structure includes: a SCR structure and a trigger structure; the SCR structure includes: a well region of a second conductivity type and a first well of a first conductivity type region, a first-doped region of the first conductivity type, and a first-doped region of the second conductivity type; the trigger structure includes: a first-doped region of the second conductivity type, a second well region of the first conductivity type, a second-doped region of two conductivity types, a third-doped region of the second conductivity type, a fourth-doped region of the second conductivity type, and a first gate electrode. The electrostatic protection structure weakens the positive feedback of the parasitic transistor in the SCR device, improves the anti-latch capability of the device, realizes stronger protection capability, and enhances the reliability of the circuit.

First claim

Opening claim text (preview).

The invention claimed is: 1. An electrostatic protection structure, comprising: a silicon controlled rectifier structure, comprising: a well region of a second conductivity type; a first well region of a first conductivity type, located adjacent to the well region of the second conductivity type; a first-doped region of the first conductivity type, located in the well region of the second conductivity type; a first-doped region of the second conductivity type, located in the first well region of the first conductivity type; a trigger structure, comprising: the first-doped region of the second conductivity type; a second well region of the first conductivity type, located in one side of the well region of the second conductivity type away from the first well region of the first conductivity type, and adjacent to the well region of the second conductivity type; a second-doped region of the second conductivity type, located in the second well region of the first conductivity type; a third-doped region of the second conductivity type adjacent to the first-doped region of the first conductivity type and extending from the well region of the second conductivity type to the first well region of the first conductivity type; a fourth-doped region of the second conductivity type, extending from the well region of the second conductivity type to the second well region of the first conductivity type; and a first gate, located between the third-doped region of the second conductivity type and the first doped region of the second conductivity type. 2. The electrostatic protection structure according to claim 1 , further comprising a second-doped region of the first conductivity type, located in the first well region of the first conductivity type, also in one side of a third-doped region of first conductivity type away from the first gate. 3. The electrostatic protection structure of claim 1 , wherein the second well region of the first conductivity type, the second-doped region of the second conductivity type, and the fourth-doped region of the second conductivity type constitutes a first transistor; and wherein the first gate, the first-doped region of the second conductivity type, the third-doped region of the second conductivity type, and the first well region of the first conductivity type constitute a first switch transistor. 4. The electrostatic protection structure according to claim 3 , wherein the first-doped region of the first conductivity type and the third-doped region of the second conductivity type constitute a diode, wherein the diode is connected to the switch transistor to form a leakage path. 5. The electrostatic protection structure according to claim 1 , wherein the well region of the second conductivity type, the first well region of the first conductivity type and the first-doped region of the second conductivity type constitute a second transistor; and wherein the well region of the second conductivity type, the first-doped region of the first conductivity type and the first well region of the first conductivity type constitute a third transistor. 6. The electrostatic protection structure of claim 1 , further comprising; a substrate of the first conductivity type; wherein the first well region of the first conductivity type, the well region of the second conductivity type, and the second well region of the first conductivity type are all located in the substrate of the first conductivity type; and wherein the first gate is located on a surface of the substrate of the first conductivity type. 7. The electrostatic protection structure according to claim 6 , further comprising a second gate, located on a surface of the substrate of the first conductivity type, between the second-doped region of the second conductivity type and the fourth-doped region of the second conductivity type; wherein the second gate, the second-doped region of the second conductivity type, the fourth-doped region of the second conductivity type, and the second well region of the first conductivity type constitutes a second switch transistor. 8. The electrostatic protection structure of claim 7 , wherein the first-doped region of the first conductivity type, the well region of the second conductivity type, and the first well region of the first conductivity type constitute a PNP transistor; wherein the well region of the second conductivity type, the first well region of the first conductivity type and the first-doped region of the second conductivity type constitute a first NPN transistor; wherein the fourth-doped region of the second conductivity type, the second well region of the first conductivity type, and the second-doped region of the second conductivity type constitute a second NPN transistor; wherein the first gate, the first-doped region of the second conductivity type and the third-doped region of the second conductivity type constitute a second switch transistor; wherein the second gate, the second-doped region of the second conductivity type and the fourth-doped region of the second conductivity type constitute a second switch transistor; and wherein the first-doped region of the first conductivity type and the third-doped region of the second conductivity type constitute a diode. 9. The electrostatic protection structure of claim 1 , wherein a width of the third-doped region of the second conductivity type and a width of the fourth-doped region of the second conductivity type are both twice a width of the first-doped region of the second conductivity type and twice a width of the second-doped region of the second conductivity type. 10. The electrostatic protection structure of claim 1 , wherein the first conductivity type includes a P-type, and the second conductivity type includes an N-type. 11. An electrostatic protection circuit, comprising: a SCR circuit, comprising a first node, a second end, a third end, a fourth end and a fifth end; wherein the first end of the SCR circuit is connected to an anode voltage; wherein the fourth end of the SCR circuit is connected to a cathode voltage; a trigger circuit, comprising a first transistor and a first switch transistor; wherein, the first transistor comprises a first end, a second end and a third end; wherein the first switch transistor comprises a control end, a first end and a second end; wherein the first end of the first transistor is connected to the anode voltage, wherein the second end of the first transistor is connected to the second end of the SCR circuit, and the third end of the first transistor is connected to the fifth end of the SCR circuit; wherein the control end of the first switch transistor is connected to the third end of the first transistor and the fifth end of the SCR circuit, the first end of the first switch transistor is connected to the third end of the SCR circuit, and wherein the second end of the first switch transistor is connected to the cathode voltage. 12. The electrostatic protection circuit according to claim 11 , wherein the SCR circuit comprises a second transistor and a third transistor; wherein the second transistor comprises a first end, a second end and a third end, the third transistor comprises a first end, a second end and a third end, wherein the first end of the second transistor is short-circuited with the second end of the third transistor to form together as the third end of the SCR circuit, wherein the second end of the second transistor is the fifth end of the SCR circuit, and wherein the third end of the second transistor is the fourth end of the SCR circuit; wherein the first end of the third transistor is the first end of the SCR circuit, and wherein the third end of the third transistor is

Assignees

Inventors

Classifications

  • Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies · CPC title

  • of insulating materials · CPC title

  • H10D89/921Primary

    characterised by the configuration of the interconnections connecting the protective arrangements, e.g. ESD buses · CPC title

  • using FETs as protective elements · CPC title

  • H10D89/713Primary

    including a PNP transistor and a NPN transistor, wherein each of said transistors has its base region coupled to the collector region of the other transistor, e.g. silicon controlled rectifier [SCR] devices · CPC title

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What does patent US12027846B2 cover?
Embodiments of the present disclosure relate to an electrostatic protection structure and an electrostatic protection circuit. The electrostatic protection structure includes: a SCR structure and a trigger structure; the SCR structure includes: a well region of a second conductivity type and a first well of a first conductivity type region, a first-doped region of the first conductivity type, a…
Who is the assignee on this patent?
Changxin Memory Tech Inc
What technology area does this patent fall under?
Primary CPC classification H10D89/921. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 02 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).