Semiconductor device and method for fabricating the same

Patent metadata

Field	Value
Publication number	US-12027490-B2
Application number	US-202117390101-A
Country	US
Kind code	B2
Filing date	Jul 30, 2021
Priority date	Aug 10, 2020
Publication date	Jul 2, 2024
Grant date	Jul 2, 2024

Abstract

A method for fabricating a semiconductor device includes providing a semiconductor die, arranging an electrical connector over the semiconductor die, the electrical connector including a conductive core, an absorbing feature arranged on a first side of the conductive core, and a solder layer arranged on a second side of the conductive core, opposite the first side and facing the semiconductor die, and soldering the electrical connector onto the semiconductor die by heating the solder layer with a laser, wherein the laser irradiates the absorbing feature and absorbed energy is transferred from the absorbing feature through the conductive core to the solder layer.

First claim

What is claimed is:

1. A method for fabricating a semiconductor device, the method comprising:
providing a semiconductor die;
arranging an electrical connector over the semiconductor die, the electrical connector comprising a conductive core, an absorbing feature arranged on a first side of the conductive core, and a solder layer arranged on a second side of the conductive core, opposite the first side and facing the semiconductor die; and
soldering the electrical connector onto the semiconductor die by heating the solder layer with a laser,
wherein the laser irradiates the absorbing feature and absorbed energy is transferred from the absorbing feature through the conductive core to the solder layer.

2. The method of claim 1 , wherein the material of the solder layer has a melting point that is lower than a melting point of the material of the conductive core, and wherein the absorbed energy is sufficient to melt the material of the solder layer but insufficient to melt the material of the conductive core.

3. The method of claim 1 , wherein an absorptance for the laser beam of the absorbing feature is higher than an absorptance for the laser beam of the conductive core.

4. The method of claim 1 , wherein the absorbing feature comprises an absorbing layer or an antireflection layer, and wherein the absorbing layer or the antireflection layer comprises a polymer, a metal or a metal oxide.

5. The method of claim 1 , wherein the soldering comprises diffusion soldering the electrical connector onto the semiconductor die.

6. The method of claim 1 , wherein the electrical connector comprises a wire, a ribbon or a sheet metal.

7. The method of claim 1 , wherein the absorbing feature and/or the solder layer is sputtered, printed, cold rolled, dip coated or galvanically deposited on the conductive core.

8. The method of claim 1 , further comprising:
using ultrasonic excitation, in addition to the laser, to heat the solder layer.

9. The method of claim 1 , wherein the electrical connector is heated to a temperature of no more than 430° C.

10. The method of claim 1 , wherein the electrical connector is arranged over the semiconductor die by a bondhead, and wherein the laser is guided through the bondhead.

11. The method of claim 1 , further comprising:
providing the electrical connector as part of a strip; and
after the soldering, singulating the electrical connector by cutting through the strip.

12. A semiconductor device, comprising:
a semiconductor die; and
an electrical connector arranged over the semiconductor die, the electrical connector comprising a conductive core, an absorbing feature arranged on a first side of the conductive core and facing away from the semiconductor die, and a solder joint arranged on a second side of the conductive core, opposite the first side and coupling the electrical connector to the semiconductor die.

13. The semiconductor device of claim 12 , wherein the conductive core has a thickness of 150 μm or more, measured between the first and second sides.

14. The semiconductor device of claim 12 , wherein the semiconductor die comprises a metallization, wherein the electrical connector is soldered to the metallization, and wherein the metallization has a thickness of 10 μm or less.

15. The semiconductor device of claim 12 , further comprising:
an electrically conductive substrate,
wherein the semiconductor die is arranged on the substrate, and
wherein the electrical connector electrically couples the semiconductor die to the substrate.

Assignees

• Infineon Technologies Ag

Inventors

• Knipper Richard
• Heinrich Alexander
• Scharf Thorsten
• Schwab Stefan

Classifications

• H10W72/522

  Multilayered bond wires, e.g. having a coating concentric around a core · CPC title

• H10W72/07536

  Soldering or alloying · CPC title

• H10W72/07535

  Applying EM radiation, e.g. induction heating or using a laser · CPC title

• H10W72/07533

  Ultrasonic bonding, e.g. thermosonic bonding · CPC title

• H10W72/5363

  the connected ends being wedge-shaped · CPC title