Multiplexer

Patent metadata

Field	Value
Publication number	US-12021494-B2
Application number	US-202018002919-A
Country	US
Kind code	B2
Filing date	Jun 26, 2020
Priority date	Jun 26, 2020
Publication date	Jun 25, 2024
Grant date	Jun 25, 2024

Abstract

An embodiment is a multiplexer including a first distributed amplifier with an impedance matched to 50Ω, the first distributed amplifier configured to receive a first signal and output a first amplified signal, a second distributed amplifier with an impedance matched to 50Ω, the second distributed amplifier configured to receive a second signal and output a second amplified signal, and a passive multiplexer configured to multiplex the first amplified signal and the second amplified signal, and output a multiplexed signal to a signal output terminal, the passive multiplexer including a first resistor having a first end to receive the first amplified signal, a second resistor having a first end to receive the second amplified signal, and a third resistor having a first end connected to second ends of the first and second resistors and a second end connected to the signal output terminal.

First claim

The invention claimed is:

1. A multiplexer comprising:
a first distributed amplifier with an impedance matched to 50Ω, the first distributed amplifier configured to receive a first signal and output a first amplified signal;
a second distributed amplifier with an impedance matched to 50Ω, the second distributed amplifier configured to receive a second signal and output a second amplified signal; and
a passive multiplexer configured to multiplex the first amplified signal and the second amplified signal, and output a multiplexed signal to a signal output terminal, the passive multiplexer including:
a first resistor having a first end to receive the first amplified signal,
a second resistor having a first end to receive the second amplified signal, and
a third resistor having a first end connected to second ends of the first and second resistors and a second end connected to the signal output terminal.

2. The multiplexer according to claim 1 , wherein the passive multiplexer further comprises:
a first transmission line configured to transmit the first amplified signal to the first end of the first resistor,
a second transmission line inserted between the second end of the first resistor and the first end of the third resistor,
a third transmission line configured to transmit the second amplified signal to the first end of the second resistor,
a fourth transmission line inserted between the second end of the second resistor and the first end of the third resistor,
a fifth transmission line inserted between the second and fourth transmission lines and the first end of the third resistor, and
a sixth transmission line inserted between the second end of the third resistor and the signal output terminal.

3. The multiplexer according to claim 2 , wherein:
resistance values of the first, second, and third resistors are 16.7Ω,
a characteristic impedance of the first resistor and the first and second transmission lines is within a range of 70Ω±20%,
a characteristic impedance of the second resistor and the third and fourth transmission lines is within a range of 70Ω±20%, and
a characteristic impedance of the third resistor and the fifth and sixth transmission lines is within a range of 50Ω±20%.

4. The multiplexer according to claim 1 , wherein the first distributed amplifier comprises:
a first input transmission line having an input end to receive the first signal,
a first output transmission line having a terminal end to output the first amplified signal,
a first input termination resistor having a first end connected to a terminal end of the first input transmission line and a second end connected to a ground,
a first output termination resistor having a first end connected to an input end of the first output transmission line and a second end connected to the ground, and
a plurality of first unit amplifiers arranged along the first input transmission line and the first output transmission line, each of the plurality of first unit amplifiers having an input terminal connected to the first input transmission line and an output terminal connected to the first output transmission line.

5. The multiplexer according to claim 4 , wherein the second distributed amplifier comprises:
a second input transmission line having an input end to receive the second signal,
a second output transmission line having a terminal end to output the second amplified signal,
a second input termination resistor having a first end connected to a terminal end of the second input transmission line and a second end connected to the ground,
a second output termination resistor having a first end connected to an input end of the second output transmission line and a second end connected to the ground, and
a plurality of second unit amplifiers arranged along the second input transmission line and the second output transmission line, each of the plurality of second unit amplifiers having an input terminal connected to the second input transmission line and an output terminal connected to the second output transmission line.

6. The multiplexer according to claim 5 , wherein each of the first unit amplifiers comprise:
a first transistor having a base terminal connected to the first input transmission line and an emitter terminal connected to a power supply voltage, and
a second transistor having a base terminal connected to a bias voltage, a collector terminal connected to the first output transmission line, and an emitter terminal connected to the collector terminal of the first transistor.

7. The multiplexer according to claim 6 , wherein each of the second unit amplifiers comprise:
a third transistor having a base terminal connected to the second input transmission line and an emitter terminal connected to the power supply voltage, and
a fourth transistor having a base terminal connected to the bias voltage, a collector terminal connected to the second output transmission line, and an emitter terminal connected to the collector terminal of the third transistor.

8. A multiplexer comprising:
a first distributed amplifier configured to receive a first signal and output a first amplified signal, the first distributed amplifier having an impedance matched to 50Ω, wherein the first distributed amplifier comprises:
a first input transmission line having an input end configured to receive the first signal,
a first output transmission line having a terminal end the first amplified signal,
a first input termination resistor having a first end connected to a terminal end of the first input transmission line and a second end connected to a ground,
a first output termination resistor having a first end connected to an input end of the first output transmission line and a second end connected to the ground, and
a plurality of first unit amplifiers arranged along the first input transmission line and the first output transmission line, each of the plurality of first unit amplifiers having an input terminal connected to the first input transmission line and an output terminal connected to the first output transmission line;

a second distributed amplifier configured to receive a second signal and output a second amplified signal, the second distributed amplifier having an impedance matched to 50Ω, wherein the second distributed amplifier comprises:
a second input transmission line having an input end configured to receive input of the second signal,
a second output transmission line having a terminal end configured to output the second amplified signal,
a second input termination resistor having a first end connected to a terminal end of the second input transmission line and a second end connected to the ground,
a second output termination resistor having a first end connected to an input end of the second output transmission line and a second end connected to the ground, and
a plurality of second unit amplifiers arranged along the second input transmission line and the second output transmission line, each of the second unit amplifiers having an input terminal connected to the second input transmission line and an output terminal connected to the second output transmission line; and

a passive multiplexer configured to multiplex the first amplified signal and the second amplified signal, the passive multiplexer including:
a first resistor having a first end connected to an output of the first distributed amplifier,
a second resistor having a first end connected to an output of the second distributed amplifier, and
a third resistor having a first end connected to second ends of the first and second resistors and a second end connected to a signal output terminal.

9. The multiplexer according to claim 8 , wherein the passive mult

Assignees

• Nippon Telegraph & Telephone

Inventors

• Jo Teruo
• Nagatani Munehiko
• Nosaka Hideyuki

Classifications

• H03H11/34

  Networks for connecting several sources or loads working on different frequencies or frequency bands, to a common load or source · CPC title

• H03F3/607

  using FET's · CPC title

• H03F3/193

  with field-effect devices (H03F3/195 takes precedence) · CPC title

• H03F1/56

  Modifications of input or output impedances, not otherwise provided for · CPC title

• H03H7/48

  Networks for connecting several sources or loads, working on the same frequency or frequency band, to a common load or source (phase shifters providing two or more output signals H03H7/21) · CPC title