Voltage balancing system for balancing unbalanced battery pack voltage caused by non-cascade of analog front ends

US12021400B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12021400-B2
Application numberUS-202017038080-A
CountryUS
Kind codeB2
Filing dateSep 30, 2020
Priority dateOct 12, 2019
Publication dateJun 25, 2024
Grant dateJun 25, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The invention provides a voltage balancing system for voltage balancing. The voltage balancing system includes an analog front end arranged in parallel with the cell group, a micro control unit communicating with the analog front end, a communication isolation module connected between the analog front end and the micro control unit, and a balancing module. The input of the balancing module is connected to the cell group to input the total voltage of the cell group. The output of the balancing module is connected to the micro control unit and the communication isolation module to output the operating voltage of the micro control unit and the communication isolation module.

First claim

Opening claim text (preview).

What is claimed is: 1. A voltage balancing system for balancing unbalanced battery pack voltage caused by non-cascade of analog front ends, comprising: a micro control unit; a low side cell group comprising at least one battery cell; a low side analog front end arranged in parallel with the low side cell group and configured to acquire an analog voltage of the low side cell group and transmit the analog voltage of the low side cell group to the micro control unit; a high side cell group comprising at least one battery cell, the high side cell group connecting with the low side cell group in series; a high side analog front end arranged in parallel with the high side cell group and configured to acquire an analog voltage of the high side cell group and transmit the analog voltage of the high side cell group to the micro control unit, the high side analog front end being not cascaded with the low side analog front end; a communication isolation module connecting the high side analog front end with the micro control unit, but no another communication isolation module connecting the low side analog front end with the micro control unit; and a balancing module; wherein an input of the balancing module is connected to an end which outputs a total voltage of the high side and low side cell groups connected in series, and an output of the balancing module is respectively connected to the micro control unit and the communication isolation module to output an operating voltage to the micro control unit and the communication isolation module; wherein the low side analog front end communicates with the micro control unit through a low side communication channel; and the high side analog front end, the communication isolation module and the micro control unit communicate with each other through a high side communication channel, the low side communication channel being isolated with the high side communication channel; wherein the balancing module is a step-down chip; wherein when the low side analog end and the high side analog end have no analog-to-digital converters integrated inside, the voltage balancing system further comprises a subtractor, the subtractor comprising a positive input connected to an output of the high side analog front end, a negative input connected to a total positive of the low side analog front end, and an output connected to the micro control unit. 2. The voltage balancing system according to claim 1 , further comprising: an additional high side cell group connected in series with the low side cell group and the high side cell group, the additional high side cell group comprising at least one battery cell; an additional high side analog front end arranged in parallel with the additional high side cell group and configured to acquire an analog voltage of the additional high side cell group and transmit the analog voltage of the additional high side cell group to the micro control unit; and an additional communication isolation module connecting the additional high side analog front end with the micro control unit, the output of the balancing module being connected to the additional communication isolation module; wherein the additional high side analog front end, the additional communication isolation module and the micro control unit communicate with each other through an additional high side communication channel; the additional high side communication channel being isolated with the low side communication channel and the high side communication channel. 3. The voltage balancing system according to claim 1 , wherein the low side analog front end communicates with a first pair of ports of the micro control unit through the low side communication channel; and the high side analog front end, the communication isolation module and a second pair of ports of the micro control unit communicate with each other through the high side communication channel, the second pair of ports being different from the first pair of ports. 4. The voltage balancing system according to claim 3 , further comprising: an additional high side cell group connected in series with the low side cell group and the high side cell group, the additional high side cell group comprising at least one battery cell; an additional high side analog front end arranged in parallel with the additional high side cell group and configured to acquire an analog voltage of the additional high side cell group and transmit the analog voltage of the additional high side cell group to the micro control unit; and an additional communication isolation module connecting the additional high side analog front end with the micro control unit, the output of the balancing module being connected to the additional communication isolation module; wherein the additional high side analog front end, the additional communication isolation module and the micro control unit communicate with each other through an additional high side communication channel, the additional high side communication channel being isolated with the low side communication channel and the high side communication channel. 5. The voltage balancing system according to claim 4 , wherein the additional high side analog front end, the additional communication isolation module and a third pair of ports of the micro control unit communicate with each other through the additional high side communication channel, the third pair of ports being different from the first pair of ports and the second pair of ports. 6. The voltage balancing system according to claim 1 , wherein the communication isolation module is an isolation chip, and an isolated DC/DC converter is integrated inside the isolation chip. 7. A voltage balancing system for balancing unbalanced battery pack voltage caused by non-cascade of analog front ends, comprising: a micro control unit; a low side cell group comprising at least one battery cell; a low side analog front end arranged in parallel with the low side cell group and configured to acquire an analog voltage of the low side cell group and transmit the analog voltage of the low side cell group to the micro control unit; a high side cell group comprising at least one battery cell, the high side cell group connecting with the low side cell group in series; a high side analog front end arranged in parallel with the high side cell group and configured to acquire an analog voltage of the high side cell group and transmit the analog voltage of the high side cell group to the micro control unit, the high side analog front end being not cascaded with the low side analog front end; a communication isolation module connecting the high side analog front end with the micro control unit, but no another communication isolation module connecting the low side analog front end with the micro control unit; and a balancing module; wherein an input of the balancing module is connected to an end which outputs a total voltage of the high side and low side cell groups connected in series, and an output of the balancing module is respectively connected to the micro control unit and the communication isolation module to output an operating voltage to the micro control unit and the communication isolation module; wherein the low side analog front end communicates with the micro control unit through a low side communication channel; and the high side analog front end, the communication isolation module and the micro control unit communicate with each other through a high side communication channel, the low side communication channel being isolated with the high side communication channel; wherein the balancing module is a step-down chip; wherein the step-down chip is a low-dropout linear regulator; wherein when the low side analog end and th

Assignees

Inventors

Classifications

  • with circuits adapted for supplying loads from the battery · CPC title

  • including monitoring or indicating arrangements · CPC title

  • H02J7/50Primary

    acting upon multiple batteries simultaneously or sequentially · CPC title

  • H02J7/52Primary

    for charge balancing, e.g. equalisation of charge between batteries · CPC title

  • Charging or discharging characterised by the power electronics converter · CPC title

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Frequently asked questions

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What does patent US12021400B2 cover?
The invention provides a voltage balancing system for voltage balancing. The voltage balancing system includes an analog front end arranged in parallel with the cell group, a micro control unit communicating with the analog front end, a communication isolation module connected between the analog front end and the micro control unit, and a balancing module. The input of the balancing module is c…
Who is the assignee on this patent?
Globe Jiangsu Co Ltd
What technology area does this patent fall under?
Primary CPC classification H02J7/50. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 25 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).