SSD managed host write atomicity with arbitrary transfer length

Patent metadata

Field	Value
Publication number	US-12019910-B2
Application number	US-202016987165-A
Country	US
Kind code	B2
Filing date	Aug 6, 2020
Priority date	Aug 6, 2020
Publication date	Jun 25, 2024
Grant date	Jun 25, 2024

Abstract

An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to control access to a primary persistent storage with a first type of media and a nonvolatile memory buffer with a second type of media that is different from the first type of media, store metadata for incoming write data in the nonvolatile memory buffer, store other data for the incoming write data in the primary persistent storage, and provide both runtime and power-fail write atomicity for the incoming write data. Other embodiments are disclosed and claimed.

First claim

What is claimed is:

1. An electronic apparatus, comprising:
one or more substrates; and
a controller coupled to the one or more substrates, the controller configured to at least:
control access to a primary persistent storage with a first type of media and a nonvolatile memory buffer with a second type of media that is different from the first type of media,
store metadata for incoming write data in the nonvolatile memory buffer,
store other data for the incoming write data in the primary persistent storage,
provide both runtime and power-fail write atomicity for the incoming write data,

store the metadata for the incoming write data in a first pool of the nonvolatile memory buffer, and
store primary persistent storage addresses for the incoming write data in a second pool of the nonvolatile memory buffer.

2. The apparatus of claim 1 , wherein the controller is further configured to:
maintain two or more queues for each of the first and second pools of the nonvolatile memory buffer; and
build a linked list of primary persistent storage address items for the incoming write data in the second pool of the nonvolatile memory buffer.

3. The apparatus of claim 2 , wherein the controller is further configured to:
atomically update multiple entries in a logical-to-physical indirection table after full write information for the incoming write is available based on the metadata stored in the first pool and the linked list of primary persistent storage address items.

4. The apparatus of claim 3 , wherein the controller is further configured to:
sequence updates of the logical-to-physical indirection table for the incoming write data separately from other incoming write data.

5. The apparatus of claim 3 , wherein the controller is further configured to:
discard the metadata in the nonvolatile memory buffer and the other data in the primary persistent storage without an update of the logical-to-physical indirection table based on an indicator in the NVM buffer in the event of a recovery from a power failure.

6. The apparatus of claim 1 , wherein the primary persistent storage and the nonvolatile memory buffer are part of a solid state drive.

7. An electronic storage system, comprising:
a primary persistent storage with a first type of media;
a nonvolatile memory buffer with a second type of media that is different from the first type of media; and
a controller communicatively coupled to the primary persistent storage and the nonvolatile memory buffer, the controller being configured to at least:
store metadata for incoming write data in the nonvolatile memory buffer,
store other data for the incoming write data in the primary persistent storage,
provide both runtime and power-fail write atomicity for the incoming write data,
store the metadata for the incoming write data in a first pool of the nonvolatile memory buffer, and
store primary persistent storage addresses for the incoming write data in a second pool of the nonvolatile memory buffer.

8. The system of claim 7 , wherein the controller is further configured to:
maintain two or more queues for each of the first and second pools of the nonvolatile memory buffer; and
build a linked list of primary persistent storage address items for the incoming write data in the second pool of the nonvolatile memory buffer.

9. The system of claim 8 , wherein the controller is further configured to:
atomically update multiple entries in a logical-to-physical indirection table after full write information for the incoming write is available based on the metadata stored in the first pool and the linked list of primary persistent storage address items.

10. The system of claim 9 , wherein the controller is further configured to:
sequence updates of the logical-to-physical indirection table for the incoming write data separately from other incoming write data.

11. The system of claim 9 , wherein the controller is further configured to:
discard the metadata in the nonvolatile memory buffer and the other data in the primary persistent storage without an update of the logical-to-physical indirection table based on an indicator in the NVM buffer in the event of a recovery from a power failure.

12. The system of claim 7 , wherein the primary persistent storage and the nonvolatile memory buffer are part of a solid state drive.

13. A method of controlling storage, comprising:
controlling, using a controller, access to a primary persistent storage with a first type of media and a nonvolatile memory buffer with a second type of media that is different from the first type of media;
storing metadata for incoming write data in the nonvolatile memory buffer;
storing other data for the incoming write data in the primary persistent storage;
providing both runtime and power-fail write atomicity for the incoming write data
storing the metadata for the incoming write data in a first pool of the nonvolatile memory buffer, and
storing primary persistent storage addresses for the incoming write data in a second pool of the nonvolatile memory buffer.

14. The method of claim 13 , further comprising:
maintaining two or more queues for each of the first and second pools of the nonvolatile memory buffer; and
building a linked list of primary persistent storage address items for the incoming write data in the second pool of the nonvolatile memory buffer.

15. The method of claim 14 , further comprising:
atomically updating multiple entries in a logical-to-physical indirection table after full write information for the incoming write is available based on the metadata stored in the first pool and the linked list of primary persistent storage address items.

16. The method of claim 15 , further comprising:
sequencing updates of the logical-to-physical indirection table for the incoming write data separately from other incoming write data.

17. The method of claim 15 , further comprising:
discarding the metadata in the nonvolatile memory buffer and the other data in the primary persistent storage without an update of the logical-to-physical indirection table based on an indicator in the NVM buffer in the event of a recovery from a power failure.

Assignees

• Sk Hynix Nand Product Solutions Corp

Inventors

• Li Peng
• Khan Jawad
• Ellis Jackson
• Trika Sanjeev

Classifications

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G06F12/1009

  using page tables, e.g. page table structures · CPC title

• G06F3/0656

  Data buffering arrangements · CPC title

• G06F2212/657

  Virtual address space management · CPC title

• G06F3/0619

  in relation to data integrity, e.g. data losses, bit errors · CPC title